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L9663 датащи(PDF) 82 Page - STMicroelectronics

номер детали L9663
подробное описание детали  PSI5 Transceiver IC
PDF  104 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L9663 датащи(HTML) 82 Page - STMicroelectronics

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Communication interface
L9663
82/104
DocID028693 Rev 1
MISO
This output signal is used to transfer data serially out of the device. Data is shifted out on the
falling edge of Serial Clock (SCLK). MISO is in high impedance under POR condition.
5.2.2
Clock and data characteristics
A microcontroller with its SPI peripheral running in the following mode can drive the SPI:
CPOL = '0' and CPHA = '1'.
The communication frame starts with the falling edge of the CS (Communication Start).
SCLK has to be low.
The MOSI data are then latched on all following falling SCLK edges into the internal shift
registers.
After Communication Start, the MISO will leave tri-state and shift the MSB of the output data
on MISO. On all following rising SCLK edges data are shifted out through the internal shift
registers to MISO.
The communication frame is finished with the rising edge of CS. If a valid communication
took place (e.g. correct number of SCLK cycles), the operation requested will be performed
(Write or Clear operation).



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