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CAP1208 датащи(PDF) 43 Page - Microchip Technology |
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CAP1208 датащи(HTML) 43 Page - Microchip Technology |
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43 / 67 page ![]() 8-Channel Capacitive Touch Sensor Datasheet 2014 Microchip Technology Inc. DS00001570B-page 43 APPLICATION NOTE: Writing a ‘0’ to clear a ‘1’ may cause a planned calibration to be skipped, if the calibration routine had not reached the sensor input yet. 5.12 Interrupt Enable Register The Interrupt Enable register determines whether a sensor pad touch or release (if enabled) causes an interrupt (see Section 4.8, "Interrupts"). For all bits in this register: ‘0’ - The ALERT# pin will not be asserted if a touch is detected on the specified sensor input. ‘1’ (default) - The ALERT# pin will be asserted if a touch is detected on the specified sensor input. Bit 7 - CS8_INT_EN - Enables the ALERT# pin to be asserted if a touch is detected on CS8 (associated with the CS8 status bit). Bit 6 - CS7_INT_EN - Enables the ALERT# pin to be asserted if a touch is detected on CS7 (associated with the CS7 status bit). Bit 5 - CS6_INT_EN - Enables the ALERT# pin to be asserted if a touch is detected on CS6 (associated with the CS6 status bit). Bit 4 - CS5_INT_EN - Enables the ALERT# pin to be asserted if a touch is detected on CS5 (associated with the CS5 status bit). Bit 3 - CS4_INT_EN - Enables the ALERT# pin to be asserted if a touch is detected on CS4 (associated with the CS4 status bit). Bit 2 - CS3_INT_EN - Enables the ALERT# pin to be asserted if a touch is detected on CS3 (associated with the CS3 status bit). Bit 1 - CS2_INT_EN - Enables the ALERT# pin to be asserted if a touch is detected on CS2 (associated with the CS2 status bit). Bit 0 - CS1_INT_EN - Enables the ALERT# pin to be asserted if a touch is detected on CS1 (associated with the CS1 status bit). 5.13 Repeat Rate Enable Register The Repeat Rate Enable register enables the repeat rate of the sensor inputs as described in Section 4.8.2, "Capacitive Sensor Input Interrupt Behavior". Table 5.21 Interrupt Enable Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 27h R/W Interrupt Enable CS8_ INT_EN CS7_ INT_EN CS6_ INT_EN CS5_ INT_EN CS4_ INT_EN CS3_ INT_EN CS2_ INT_EN CS1_ INT_EN FFh Table 5.22 Repeat Rate Enable Register ADDR R/W REGISTER B7 B6 B5 B4B3B2B1B0 DEFAULT 28h R/W Repeat Rate Enable CS8_ RPT_EN CS7_ RPT_EN CS6_ RPT_EN CS5_ RPT_EN CS4_ RPT_EN CS3_ RPT_EN CS2_ RPT_EN CS1_ RPT_EN FFh |
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