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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ATMEGA16 датащи(PDF) 159 Page - ATMEL Corporation |
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ATMEGA16 датащи(HTML) 159 Page - ATMEL Corporation |
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159 / 315 page  159 ATmega16(L) 2466E–AVR–10/02 do not contain data to be transmitted. When disabled, the transmitter will no longer over- ride the TxD port. • Bit 2 – UCSZ2: Character Size The UCSZ2 bits combined with the UCSZ1:0 bit in UCSRC sets the number of data bits (Character Size) in a frame the receiver and transmitter use. • Bit 1 – RXB8: Receive Data Bit 8 RXB8 is the ninth data bit of the received character when operating with serial frames with nine data bits. Must be read before reading the low bits from UDR. • Bit 0 – TXB8: Transmit Data Bit 8 TXB8 is the ninth data bit in the character to be transmitted when operating with serial frames with nine data bits. Must be written before writing the low bits to UDR. USART Control and Status Register C – UCSRC The UCSRC Register shares the same I/O location as the UBRRH Register. See the “Accessing UBRRH/ UCSRC Registers” on page 155 section which describes how to access this register. • Bit 7 – URSEL: Register Select This bit selects between accessing the UCSRC or the UBRRH Register. It is read as one when reading UCSRC. The URSEL must be one when writing the UCSRC. • Bit 6 – UMSEL: USART Mode Select This bit selects between Asynchronous and Synchronous mode of operation. Bit 765 432 10 URSEL UMSEL UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL UCSRC Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 1 0 0 0 0 1 1 0 Table 63. UMSEL Bit Settings UMSEL Mode 0 Asynchronous Operation 1 Synchronous Operation |
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