AS4LC8M8S0 datasheet(8/24 Pages) ALSC | 3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

поискавой системы для электроныых деталей

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AS4LC8M8S0 датащи(PDF) 8 Page - Alliance Semiconductor Corporation

номер детали	AS4LC8M8S0

подробное описание детали	3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

PDF	24 Pages

Scroll/Zoom	100%

производитель	ALSC [Alliance Semiconductor Corporation]

домашняя страница	https://www.alliancememory.com

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AS4LC4M16S0

AS4LC16M4S0

AC parameters common to all waveforms

Sym

Parameter

CAS

latency

-75

-8

-10F

-10

Unit Notes

Min Max

Min

Max

Min

Max

Min

Max

tRRD Row active to row active delay

15

–

20

–

20

–

20

–

ns

1

tRCD RAS to CAS delay time

20

–

20

–

20

–

30

–

ns

1

tRP Row precharge

20

–

20

–

20

–

30

–

ns

1

tRAS Row active

44

–

50

–

50

–

60

–

ns

1

tRC Row cycle time

66

–

70

–

70

–

90

–

ns

1

tCDL

Last data in to new column

address delay

1

–

1

–

1–1–

CLK

2

tRDL Last data in to row precharge

2

–

2

–

2

–

2

–

CLK

2

tBDL Last data in to burst stop

1

–

1

–

1

–

1

–

CLK

2

tCCD

Column address to column

address delay

1

–

1

–

1–1–

CLK

3

tCK CLK cycle time

37.5

–

8

–

10

–

10

–

ns

4

210

–

10

–

15

–

15

–

4

tAC CLK to valid output delay @ 50pF

35.4

–

6

–

6

–

6

–

ns

4,5,7

26

–

6

–

6

–

6

–

4,5,7

tOH Output data hold time @ 50 pF

32.7

–

3

–

3

–

3

–

ns

4,5,7

23

–

3

–

3

–

3

–

4,5,7

tCH CLK high pulse width

2.5

–

3

–

3

–

3

–

ns

6

tCL CLK low pulse width

2.5

–

3

–

3

–

3

–

ns

6

tAS Add setup time

1.5

–

2

–

2

–

2

–

ns

6

tAH Add hold time

0.8

–

1

–

1

–

1

–

ns

6

tSLZ CLK to output in low Z

1

–

1

–

1

–

1

–

ns

5

tSHZ CLK to output in high Z

3–

6

–

7

–

7

–

7

ns

2–

6

–

7

–

7

–

7

tCKH CKE hold time

0.8

–

1

–

1–1–

ns

tCKS CKE setup time

1.5

–

2

–

2

–

2

–

ns

tCMH

CS, RAS, CAS, WE, DQM hold

time

0.8

–

1

–

1–1–

ns

tCMS

CS, RAS, CAS, WE, DQM setup

time

1.5

–

2

–

2–2–

ns

tDH Data in hold time

0.8

–

1

–

1

–

1

–

ns

tDS Data in setup time

1.5

–

2

–

2

–

2

–

ns

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