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TH06 датащи(PDF) 3 Page - List of Unclassifed Manufacturers |
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TH06 датащи(HTML) 3 Page - List of Unclassifed Manufacturers |
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3 / 26 page ![]() Tel:+86-755-82973805 Fax: +86-755-82973550 Email:sales@hoperf.com http://www.hoperf.com 3 Table 2. General Specifications (Continued) 1.9 < VDD < 3.6 V; TA = –40 to 125 °C default conversion time unless otherwise noted. Parameter Symbol Test Condition Min Typ Max Unit Conversion Time1 t CONV 12-bit RH — 10 12 ms 11-bit RH — 5.8 7 10-bit RH — 3.7 4.5 8-bit RH — 2.6 3.1 14-bit temperature — 7 10.8 13-bit temperature — 4 6.2 12-bit temperature — 2.4 3.8 11-bit temperature — 1.5 2.4 Powerup Time t PU From VDD ≥ 1.9 V to ready for a conversion, 25 °C — 18 25 ms From VDD ≥ 1.9 V to ready for a con- version, full temperature range — — 80 After issuing a software reset command — 5 15 Notes: 1. Initiating a RH measurement will also automatically initiate a temperature measurement. The total conversion time will be tCONV(RH) + tCONV(T). 2. No conversion or I2C transaction in progress. Typical values measured at 25 °C. 3. Occurs once during powerup. Duration is <5 msec. 4. Occurs during I2C commands for Reset, Read/Write User Registers, Read EID, and Read Firmware Version. Duration is <100 µs when I2C clock speed is >100 kHz (>200 kHz for 2-byte commands). 5. IDD after a user register write. Initiating any other subsequent I2C transaction on the same bus (such as the user register read, starting an RH measurement, or traffic directed at other I2C devices) will transition the device to standby mode. 6. Additional current consumption when HTRE bit enabled. See section “5.5. Heater” for more information Table 3. I2C Interface Specifications1 1.9 ≤ V DD ≤ 3.6 V; TA = –40 to +125 °C unless otherwise noted. Parameter Symbol Test Condition Min Typ Max Unit Hysteresis VHYS High-to-low versus low-to- high transition 0.05 x VDD — — V SCLK Frequency2 fSCL — — 400 kHz SCL High Time tSKH 0.6 — — µs SCL Low Time tSKL 1.3 — — µs Start Hold Time tSTH 0.6 — — µs Notes: 1. All values are referenced to VIL and/or VIH. 2. Depending on the conversion command, the TH06 may hold the master during the conversion (clock stretch). At above 100 kHz SCL, the TH06 may also hold the master briefly for user register and device ID transactions. At the highest I2C speed of 400 kHz the stretching will be <10 µs. 3. Pulses up to and including 50 ns will be suppressed. |
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