PIC16C745SLASHP datasheet(95/158 Pages) MICROCHIP

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DS41124A-page 95

PIC16C745/765

13.0

SPECIAL FEATURES OF THE

CPU

What sets a microcontroller apart from other proces-

sors are special circuits to deal with the needs of real-

time applications. The PIC16C745/765 family has a

host of such features intended to maximize system reli-

ability, minimize cost through elimination of external

components, provide power saving operating modes

and offer code protection. These are:

• Oscillator selection

• Reset

- Power-on Reset (POR)

- Power-up Timer (PWRT)

- Oscillator Start-up Timer (OST)

- Brown-out Reset (BOR)

• Interrupts

• Watchdog Timer (WDT)

• SLEEP

• Code protection

• ID locations

• In-Circuit Serial Programming™ (ICSP)

The PIC16C745/765 has a Watchdog Timer, which can

be shut off only through configuration bits. It runs off its

own dedicated RC oscillator for added reliability. There

are two timers that offer necessary delays on power-up.

One is the Oscillator Start-up Timer (OST), intended to

keep the chip in reset until the crystal oscillator is stable.

The other is the Power-up Timer (PWRT), which pro-

vides a fixed delay of 72 ms (nominal) on power-up only

and is designed to keep the part in reset, while the

power supply stabilizes. With these two timers on-chip,

most applications need no external reset circuitry.

SLEEP mode is designed to offer a very low current

power-down mode. The user can wake-up from SLEEP

through external reset, WDT wake-up or through an

interrupt. Several oscillator options are also made

available to allow the part to fit the application. The EC

oscillator allows the user to directly drive the microcon-

troller, while the HS oscillator allows the use of a high

speed crystal/resonator. A set of configuration bits are

used to select various options.

13.1

Configuration Bits

The configuration bits can be programmed (read as '0')

or left unprogrammed (read as '1') to select various

device configurations. These bits are mapped in pro-

gram memory location 2007h.

The user will note that address 2007h is beyond the user

program memory space. In fact, it belongs to the special

test/configuration memory space (2000h - 3FFFh),

which can be accessed only during programming.

CP1

CP0

CP1

CP0

CP1

CP0

—

—CP1

CP0

PWRTE WDTE FOSC1 FOSC0

CONFIG

Address

2007h

bit13

bit0

bit 13-12: CP<1:0>: Code Protection bits(1)

11-10: 00 = All memory is code protected

9-8:

= Upper 3/4th of program memory code protected

5-4:

= Upper half of program memory code protected

= Code protection off

bit 7-6:

Unimplemented: Read as ’1’

bit 3:

PWRTE: Power-up Timer Enable bit

1 = PWRT disabled • No delay after Power-up reset or Brown-out reset

0 = PWRT enabled • A delay of 4x WDT (72 ms) is present after Power-up and Brown-out

bit 2:

WDTE: Watchdog Timer Enable bit

1 = WDT enabled

0 = WDT disabled

bit 1-0:

FOSC<1:0>: Oscillator Selection

- HS- HS osc

- EC- External clock. CLKOUT on OSC2 pin

- H4- HS osc with 4x PLL enabled

- E4- External clock with 4x PLL enabled. CLKOUT on OSC2 pin

Note 1:

All of the CP<1:0> pairs have to be given the same value to enable the code protection scheme listed.

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