PIC16C745SLASHP datasheet(33/158 Pages) MICROCHIP

33 / 158 page

Advanced Information

DS41124A-page 33

PIC16C745/765

5.2

PORTB and TRISB Registers

PORTB is an 8-bit wide bi-directional port. The corre-

sponding data direction register is TRISB. Setting a bit

in the TRISB register puts the corresponding output

driver in a hi-impedance input mode. Clearing a bit in

the TRISB register puts the contents of the output latch

on the selected pin(s).

Each of the PORTB pins has a weak internal pull-up. A

single control bit can turn on all the pull-ups. This is per-

formed by clearing bit RBPU (OPTION_REG<7>). The

weak pull-up is automatically turned off when the port

pin is configured as an output. The pull-ups are dis-

abled on a power-on reset.

FIGURE 5-3:

BLOCK DIAGRAM OF RB<3:0>

PINS

Four of PORTB’s pins, RB<7:4>, have an interrupt on

change feature. Only pins configured as inputs can

cause this interrupt to occur (i.e. any RB<7:4> pin con-

figured as an output is excluded from the interrupt-on-

change comparison). The input pins (of RB<7:4>) are

compared with the value latched on the last read of

PORTB. The “mismatch” outputs of RB<7:4> are

OR’ed together to generate the RB Port Change Inter-

rupt with flag bit RBIF (INTCON<0>).

This interrupt can wake the device from SLEEP. The

user, in the interrupt service routine, can clear the inter-

rupt in the following manner:

Any read or write of PORTB. This will end the

mismatch condition.

Clear flag bit RBIF.

A mismatch condition will continue to set flag bit RBIF.

Reading PORTB will end the mismatch condition, and

allow flag bit RBIF to be cleared.

This interrupt-on-mismatch feature, together with soft-

ware configureable pull-ups on these four pins, allow

easy interface to a keypad and make it possible for

wake-up on key-depression. Refer to the Embedded

Control Handbook,

“Implementing Wake-Up on Key

Stroke” (AN552).

The interrupt-on-change feature is recommended for

wake-up on key depression operation and operations

where PORTB is only used for the interrupt-on-change

feature. Polling of PORTB is not recommended while

using the interrupt-on-change feature.

RB0/INT is an external interrupt input pin and is config-

ured using the INTEDG bit (OPTION_REG<6>).

RB0/INT is discussed in detail in Section 13.5.1.

FIGURE 5-4:

BLOCK DIAGRAM OF

RB<7:4> PINS

RBPU(1)

Data Bus

WR Port

WR TRIS

RB0/INT

Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s)

Data Latch

VDD

RD TRIS

RD Port

weak

pull-up

RD Port

I/O

TTL

Input

Buffer

Schmitt Trigger

Buffer

TRIS Latch

and clear the RBPU bit (OPTION_REG<7>).

VDD

Data Latch

From other

RBPU(1)

VDD

I/O

Data Bus

WR Port

WR TRIS

Set RBIF

TRIS Latch

RD TRIS

RD Port

RB<7:4> pins

weak

pull-up

RD Port

Latch

TTL

Input

Buffer

Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s)

Buffer

RB<7:6> in serial programming mode

and clear the RBPU bit (OPTION_REG<7>).

VDD

PIC16C745/P датащи(PDF) 33 Page - Microchip Technology

PIC16C745/P датащи(HTML) 33 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL