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MAX550AC/D датащи(PDF) 13 Page - Maxim Integrated Products

номер детали MAX550AC/D
подробное описание детали  2.5V to 5.5V, Low-Power, Single/Dual, 8-Bit Voltage-Output DACs in 關MAX Package
PDF  16 Pages
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производитель  MAXIM [Maxim Integrated Products]
домашняя страница  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX550AC/D датащи(HTML) 13 Page - Maxim Integrated Products

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+2.5V to +5.5V, Low-Power, Single/Dual,
8-Bit Voltage-Output DACs in µMAX Package
______________________________________________________________________________________
13
Table 6. Analog Output vs. Code
Microprocessor Interfacing
The MAX548A/MAX549A/MAX550A serial interface is
SPI/QSPI and Microwire compatible. For SPI/QSPI, clear
the CPOL and CPHA bits (CPOL = 0 and CPHA = 0).
CPOL = 0 sets the clock idle state to zero, and CPHA =
0 changes data at SCLK’s falling edge. This is the
Microwire default condition. If a serial port is not avail-
able on your microprocessor, three bits of a parallel port
can be used to emulate a serial port by bit manipulation.
Operate the serial clock only when necessary, to mini-
mize digital feedthrough at the DAC registers.
__________Applications Information
Power-Supply
and Ground Considerations
Connect GND to the highest quality ground available.
Bypass VDD with a 0.1µF to 0.22µF capacitor to GND.
The reference input can be used without bypassing.
However, for optimum line/load-transient response and
noise performance, bypass the reference input with a
0.1µF to 4.7µF capacitor to GND.
Careful PC board layout minimizes crosstalk in DAC regis-
ters, the reference, and the digital inputs. Separate analog
traces by running ground traces between them. Make sure
that high-frequency digital lines are not routed parallel to
analog lines.
AC Considerations
Digital Feedthrough
High-speed data at any of the digital input pins can
couple through a DAC’s internal stray package capaci-
tance and cause noise (digital feedthrough) at the DAC
output, even though LDAC and/or CS are held high
(see
Typical Operating Characteristics). Test digital
feedthrough by holding LDAC and/or CS high and tog-
gling the digital inputs from all 1s to all 0s.
Analog Feedthrough
Due to internal stray capacitance, higher frequency analog
input signals at REF can couple to the output, even when
the input digital code is all 0s. This condition is shown in
the MAX549A/MAX550A Reference AC Feedthrough vs.
Frequency graph in the
Typical Operating Characteristics.
Test analog feedthrough by setting all DAC outputs to 0V
and sweeping REF.
Note: 1LSB = VREF x 2
-8 = VREF(1 / 256); ANALOG OUTPUT = +VREF(I / 256), where I = Integer Value of Digital Input.
_____________________________________________Pin Configurations (continued)
OUTB
SCLK
DIN
1
2
8
7
VDD
REF
OUTA
CS
GND
DIP/
µMAX
TOP VIEW
3
4
6
5
MAX549A
LDAC
SCLK
DIN
1
2
8
7
VDD
REF
OUT
CS
GND
DIP/
µMAX
3
4
6
5
MAX550A
ANALOG OUTPUT (V)
+VREF(255 / 256)
+VREF(129 / 256)
0
0
0
0
1
0
0
1
+VREF(128 / 256) = +VREF / 2
+VREF(127 / 256)
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
D6
1
1
D4
1
+VREF(1 / 256)
D5
1
0
D2
1
0
DAC CONTENTS
D0
1
0
D1
1
0
D3
1
0
D7
1
0
0
0
0
0
0
0
0
1
0
0
0



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