ICS831724AKI REVISION A MAY 16, 2013

6

©2013 Integrated Device Technology, Inc

ICS831724I Data Sheet

DIFFERENTIAL CLOCK DATA MULTIPLEXER

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

NOTE 1: Measured from the differential input crossing point to the differential output crossing point.

NOTE 2: Defined as skew between input paths on the same device, using the same input signal levels, measured at one specific output at the

differential cross points.

NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.

NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency and

with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.

NOTE 5: Measurement taken from differential waveform.

NOTE 6: Measurement from -150mV to +150mV on the differential waveform (derived from Q minus nQ). The signal must be monotonic

through the measurement region for rise and fall time. The 300mV measurement window is centered on the differential zero crossing.

NOTE 8: Measurement taken from single-ended waveform.

NOTE 9: Defined as the maximum instantaneous voltage including overshoot. See Parameter Measurement Information Section.

NOTE 10: Defined as the minimum instantaneous voltage including undershoot. See Parameter Measurement Information Section.

Notes continued on next page.

NOTE 11: Measured at crossing point where the instantaneous voltage value of the rising edge of Q equals the falling edge of nQ.

See Parameter Measurement Information Section

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Output Frequency

350

MHz

tjit

Buffer Additive Phase

Jitter, RMS

100MHz, Integration Range:

12kHz – 20MHz

0.357

0.480

ps

Propagation Delay;

NOTE 1, 3

Any CLK, nCLK to any Q, nQ

2.7

3.9

ns

tsk(o)

Output Skew; NOTE 3,15

Across all outputs

175

ps

tsk(i)

Input Skew; NOTE 2, 3

165

ps

tsk(pp)

Part-to-Part Skew;

NOTE 3, 4

450

ps

Mux Isolation

ƒ = 100MHz

94

dB

Rising

Edge Rate

Rising Edge Rate;

NOTE 5, 6

0.6

4.2

V/ns

0.6

6.8

V/ns

Falling

Edge Rate

Falling Edge Rate;

NOTE 5, 6

0.6

4.5

V/ns

0.6

6.7

V/ns

Time before VRB is

allowed; NOTE 5, 7

500

ps

Ringback Voltage;

NOTE 5, 7

-100

100

mV

Absolute Maximum Output

Voltage; NOTE 8, 9

1150

mV

Absolute Minimum Output

Voltage; NOTE 8, 10

-300

mV

Absolute Crossing Voltage;

NOTE 8, 11, 12

200

550

mV

V

CROSS

over all edges;

NOTE 8, 11, 13

140

mV

odc

Output Duty Cycle;

NOTE 14

46

54

%

40

60

%