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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ICS831724I датащи(PDF) 19 Page - Integrated Device Technology |
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ICS831724I датащи(HTML) 19 Page - Integrated Device Technology |
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19 / 24 page  ICS831724AKI REVISION A MAY 16, 2013 19 ©2013 Integrated Device Technology, Inc ICS831724I Data Sheet DIFFERENTIAL CLOCK DATA MULTIPLEXER 3. Calculations and Equations. The purpose of this section is to calculate power dissipation on the IC per HCSL output pair. HCSL output driver circuit and termination are shown in Figure 5. Figure 5. HCSL Driver Circuit and Termination HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power dissipation, use the following equations which assume a 50 load to ground. The highest power dissipation occurs at VDD_MAX. Power = (VDD_MAX –VOUT)*IOUT, since VOUT =IOUT *RL Power = (VDD_MAX –IOUT *RL)*IOUT Power = (3.6V – 17mA * 50 ) * 17mA Total Power Dissipation per output pair = 46.8mW VDD VOUT RL 50 IC IOUT = 17mA RREF = 475 ±1% |
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