Low-Power, 622Mbps Limiting Amplifiers

with Chatter-Free Power Detect for LANs

_______________________________________________________________________________________

5

____________________________Typical Operating Characteristics (continued)

unless otherwise noted.)

______________________________________________________________Pin Description

NAME

FUNCTION

1

FILTER

Sets the integration frequency of the power detector. Impedance at this node is approximately 500

Ω.

2

RSSI

Received-Signal-Strength Indicator. An analog DC voltage representing the input power.

PIN

50mV/

div

500ps/div

DATA OUTPUT SINGLE-ENDED

INPUT = 2Vp-p

200mV/

div

200ps/div

RANDOM JITTER

DIFFERENTIAL OUTPUT

(OUT+ - OUT-)

INPUT = 16mVp-p

1-0 PATTERN 622Mbps

FREQUENCY ON POWER SUPPLY (Hz)

10

8

4

2

6

RANDOM JITTER vs.

POWER-SUPPLY NOISE FREQUENCY

DIFFERENTIAL OUTPUT RANDOM JITTER

DATA INPUT AMPLITUDE = 16mVp-p

INPUT AMPLITUDE

POWER SUPPLY = 100mVp-p

3

EN

4, 17

+5V Power Supply

5

VIN+

Positive Input Data

6

VIN-

Negative Input Data

7

GND

Supply Ground

8

SUB

Substrate. Connect to ground.

9

CZP

Sets input offset correction, low-frequency cutoff.

10

CZN

Sets input offset correction, low-frequency cutoff.

11

INV

Negative Input to Op Amp. Used for programming the loss-of-signal threshold.

12

VTH

Loss-of-Signal Threshold Voltage

13

GNDO

Ground Power Supply for Output Buffers

14

OUT-

Negative PECL Data Output

15

OUT+

Positive PECL Data Output

16

VCCO

+5V Power Supply for Output Buffers

18

LOS-

Negative Loss-of-Power Flag, TTL (MAX3761) or PECL (MAX3762)

19

LOS+

Positive Loss-of-Power Flag, TTL (MAX3761) or PECL (MAX3762)

20

DISABLE

Disables the data outputs when high. TTL (MAX3761) or PECL (MAX3762).