8

LTC692/LTC693

Microprocessor Reset

The LTC692/LTC693 use a bandgap voltage reference and

a precision voltage comparator C1 to monitor the 5V

falls below the reset voltage threshold, the RESET output

is forced to active low state. The reset voltage threshold

typical). On power-up, the RESET signal is held active low

for a minimum of 140ms after reset voltage threshold is

reached to allow the power supply and microprocessor to

stabilize. The reset active time is adjustable on the LTC693.

On power-down, the RESET signal remains active low

microprocessor in stable shutdown condition. Figure 1

shows the timing diagram of the RESET signal.

The precision voltage comparator, C1, typically has 40mV

not activate the RESET output. Response time is typically

10

µs.Tohelppreventmistriggeringduetotransientloads,

leads trimmed as short as possible.

The LTC693 has two additional outputs: RESET and LOW

LINE. RESET is an active high output and is the inverse of

RESET. LOW LINE is the output of the precision voltage

threshold, LOW LINE goes low. LOW LINE returns high as

Battery Switchover

through a PMOS switch, M2. C2 has typically 20mV of

is approximately 20

µs.

During normal operation, the LTC692/LTC693 use a charge

pumped NMOS power switch to achieve low dropout and

low supply current. This power switch can deliver up to

of 5

of 0.1

µF or greater to ensure stability. Use of a larger

bypass capacitor is advantageous for supplying current to

heavy transient loads.

When operating currents larger than 50mA are required

ential) is desired, the LTC693 should be used. This prod-

uct provides BATT ON output to drive the base of the

external PNP transistor (Figure 2). If higher currents are

needed with the LTC692, a high current Schottky diode

supply the extra current.

S

APPLICATI

I FOR ATIO

t1

t1 = RESET ACTIVE TIME

V1 = RESET VOLTAGE THRESHOLD

V2 = RESET VOLTAGE THRESHOLD +

RESET THRESHOLD HYSTERESIS

t1

V2

V2

V1

V1

LTC692/3 • F01

RESET

LOW LINE

Figure 1. Reset Active Time