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LTC2400CS8 датащи(PDF) 12 Page - Linear Technology |
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LTC2400CS8 датащи(HTML) 12 Page - Linear Technology |
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12 / 40 page ![]() 12 LTC2400 APPLICATIONS INFORMATION Table 2. LTC2400 Output Data Format Bit 31 Bit 30 Bit 29 Bit 28 Bit 27 Bit 26 Bit 25 Bit 24 Bit 23 … Bit 4 Bit 3-0 Input Voltage EOC DMY SIG EXR MSB LSB SUB LSBs* VIN > 9/8 • VREF 00 1 1 0 001 1 ... 1 X 9/8 • VREF 00 1 1 0 001 1 ... 1 X VREF + 1LSB 0 0 1 1 0 0 0 0 0 ... 0 X VREF 00 1 0 1 111 1 ... 1 X 3/4VREF + 1LSB 0 0 1 0 1 1 0 0 0 ... 0 X 3/4VREF 00 1 0 1 011 1 ... 1 X 1/2VREF + 1LSB 0 0 1 0 1 0 0 0 0 ... 0 X 1/2VREF 00 1 0 0 111 1 ... 1 X 1/4VREF + 1LSB 0 0 1 0 0 1 0 0 0 ... 0 X 1/4VREF 00 1 0 0 011 1 ... 1 X 0+/0– 0 0 1/0** 0 0 0 0 0 0 ... 0 X –1LSB 0 0 0111 1 1 1 ... 1 X –1/8 • VREF 00 0 1 1 110 0 ... 0 X VIN < –1/8 • VREF 00 0 1 1 110 0 ... 0 X *The sub LSBs are valid conversion results beyond the 24-bit level that may be included in averaging or discarded without loss of resolution. **The sign bit changes state during the 0 code. Figure 3. Output Data Timing out on the falling edge of the 31st SCK and may be latched on the rising edge of the 32nd SCK pulse. On the falling edge of the 32nd SCK pulse, SDO goes HIGH indicating a new conversion cycle has been initiated. This bit serves as EOC (Bit 31) for the next conversion cycle. Table 2 sum- marizes the output data format. As long as the voltage on the VIN pin is maintained within the – 0.3V to (VCC + 0.3V) absolute maximum operating range, a conversion result is generated for any input value from – 0.125 • VREF to 1.125 • VREF. For input voltages greater than 1.125 • VREF, the conversion result is clamped to the value corresponding to 1.125 • VREF. For input voltages below – 0.125 • VREF, the conversion result is clamped to the value corresponding to – 0.125 • VREF. Frequency Rejection Selection (FO Pin Connection) The LTC2400 internal oscillator provides better than 110dB normal mode rejection at the line frequency and all its harmonics for 50Hz ±2% or 60Hz ±2%. For 60Hz rejec- tion, FO (Pin 8) should be connected to GND (Pin 4) while for 50Hz rejection the FO pin should be connected to VCC (Pin 1). MSB EXT SIG “0” 1 2 3 4 5 272832 BIT 0 BIT 27 BIT 4 LSB24 BIT 28 BIT 29 BIT 30 SDO SCK CS EOC BIT 31 SLEEP DATA OUTPUT CONVERSION 2400 F03 Hi-Z |
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