LT1339C datasheet(14/20 Pages) LINER

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LT1339

APPLICATIONS INFORMATION

RSL1 = 45k and RSL2 = 30k sets the desired reference

voltage and has a REQ of 18k, which meets both design

requirements. Figure 7b shows the slope compensation

effective waveforms both with and without the SL/ADJ

external resistors.

Power MOSFET and Catch Diode Selection

External N-channel MOSFET switches are used with the

LT1339. The positive gate-source drive voltage of the

LT1339 for both switches is roughly equivalent to the

12VIN supply voltage, so standard threshold MOSFETs

can be used.

Selection criteria for the power MOSFETs include the “ON”

resistance (RDS(ON)), reverse transfer capacitance (CRSS),

maximum drain-source voltage (VDSS) and maximum

output current.

The power FETs selected must have a maximum operating

VDSS exceeding the maximum VIN. VGS voltage maximum

must exceed the 12VIN supply voltage.

Once voltage requirements have been determined, RDS(ON)

can be selected based on allowable power dissipation and

required output current.

In an LT1339 buck converter, the average inductor current

is equal to the DC load current. The average currents

through the main and synchronous switches are:

IMAIN = (ILOAD)(DC)

ISYNC = (ILOAD)(1 – DC)

The RDS(ON) required for a given conduction loss can be

calculated using the relation:

PLOSS = (ISWITCH)

2(RDS(ON))

In high voltage applications (VIN > 20V), the topside switch

is required to slew very large voltages. As VIN increases,

transition losses increase through a square relation, until

it becomes the dominant power loss term in the main

switch. This transition loss takes the form:

PTR ≈ (k)(VIN)

2(IMAX)(CRSS)(fO)

where k is a constant inversely related to the gate drive

current, approximated by k = 2 in LT1339 applications.

MIN ≥

() Ω

() −

()

()(

)

=µ

0 01

1 5 1

0 084 100000

11 9

Since L = 5

µH is less than LMIN, additional slope compen-

sation is necessary. The total slope compensation

required is:

X ≥









−

()=()







15 1

2 10

Amp/s

Subtracting the internally generated slope compensation

and solving for the required effective resistance at SL/ADJ

yields:

SENSE

≤

()( )

()





() − ()( )

2500

2 10

0 084

21 5

Setting the resistor divider reference voltage at 2V assures

that the additional compensation waveform will be

enabled at 75% duty cycle. As shown in Figure 7a, using

RSL2

30k

RSL1

45k

1339 • F07a

5VREF

LT1339

SL/ADJ

Figure 7a. External Slope Compensation Resistors

Figure 7b. Slope Compensation Waveforms

(0.084 + 0.139)(fO)

RSENSE

(0.084)(fO)

RSENSE

2.5V

0.8V

DC = 0.75

1339 • F07b

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