LT1339C datasheet(12/20 Pages) LINER

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LT1339

APPLICATIONS INFORMATION

MIN

OUT

OIN

= ()

−

()

()( )( )

∆

where fO = operating frequency. Given an inductor value

(L), the peak inductor current is the sum of the average

inductor current (IAVG)and half the inductor ripple current

(

∆I), or:

AVG

OUT

OIN

=+ ()

−

()

()()( )( )

The inductor core type is determined by peak current and

efficiency requirements. The inductor core must with-

stand peak current without saturating, and series winding

resistance and core losses should be kept as small as is

practical to maximize conversion efficiency.

The LT1339 peak current limit threshold is 40% greater

than the average current limit threshold. Slope compensa-

tion effects reduce this margin as duty cycle increases.

This margin must be maintained to prevent peak current

limit from corrupting the programmed value for average

current limit. Programming the peak ripple current to less

than 15% of the desired average current limit value will

assure porper operation of the average current limit

feature through 90% duty cycle (see Slope Compensation

section).

Oscillator Synchronization

The LT1339 oscillator generates a modified sawtooth

waveform at the CT pin between low and high thresholds

of about 0.8V (vl) and 2.5V (vh) respectively. The oscillator

can be synchronized by driving a TTL level pulse into the

SYNC pin. This inputs to a one-shot circuit that reduces the

oscillator high threshold to 2V for about 200ns. The SYNC

input signal should have minimum high/low times of

≥1µs.

Slope Compensation

Current mode switching regulators that operate with a

duty cycle greater than 50% and have continuous inductor

current can exhibit duty cycle instability. While a regulator

will not be damaged and may even continue to function

acceptably during this type of subharmonic oscillation, an

irritating high-pitched squeal is usually produced.

The criterion for current mode duty cycle instability is met

when the increasing slope of the inductor ripple current is

less than the decreasing slope, which is the case at duty

cycles greater than 50%. This condition is illustrated in

Figure 5a. The inductor ripple current starts at I1, at the

beginning of each oscillator switch cycle. Current

increases at a rate S1 until the current reaches the control

trip level I2. The controller servo loop then disables the

main switch (and enables the synchronous switch) and

inductor current begins to decrease at a rate S2. If the

current switch point (I2) is perturbed slightly and

increased by

∆I, the cycle time ends such that the mini-

mum current point is increased by a factor of (1 + S2/S1)

to start the next cycle. On each successive cycle, this error

is multiplied by a factor of S2/S1. Therefore, if S2/S1 is

≥ 1, the system is unstable.

Subharmonic oscillations can be eliminated by augment-

ing the increasing ripple current slope (S1) in the control

loop. This is accomplished by adding an artificial ramp on

the inductor current waveform internal to the IC (with a

slope SX) as shown in Figure 5b. If the sum of the slopes

S1 + SX is greater than S2, the condition for subharmonic

oscillation no longer exists.

For a buck converter, the required additional current

waveform slope, or “Slope Compensation,” follows the

relation:

≥









−

()

0.8V

1339 F04

2.5V

(vl)

SYNC

VCT

(vh)

FREE RUN

SYNCHRONIZED

Figure 4. Free Run and Synchronized Oscillator

Waveforms (at CT Pin)

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