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AN4570 датащи(PDF) 25 Page - STMicroelectronics |
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AN4570 датащи(HTML) 25 Page - STMicroelectronics |
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25 / 46 page ![]() DocID026804 Rev 1 25/46 AN4570 Interfacing with a non-multiplexed, asynchronous 16-bit SRAM 45 Figure 8. 16-bit SRAM: IS61WV51216BLL connection to STM32F30xxD/E A firmware example is available hereafter. The main goal of this example is to provide the basics of how to use the FMC firmware library and the associate SRAM driver to perform read/write operations on the IS61WV51216BLL SRAM memory. /* Includes --------------------------------------------------------------- ---*/ #include "stm32f3xx_hal.h" /* Private define --------------------------------------------------------- ---*/ #define SRAM_DEVICE_ADDR ((uint32_t)0x68000000) #define SRAM_DEVICE_SIZE ((uint32_t)0x200000) /* SRAM device size in MBytes */ /* #define SRAM_MEMORY_WIDTH FMC_NORSRAM_MEM_BUS_WIDTH_8 */ #define SRAM_MEMORY_WIDTH FMC_NORSRAM_MEM_BUS_WIDTH_16 #define SRAM_BURSTACCESS FMC_BURST_ACCESS_MODE_DISABLE /* #define SRAM_BURSTACCESS FMC_BURST_ACCESS_MODE_ENABLE*/ #define SRAM_WRITEBURST FMC_WRITE_BURST_DISABLE /* #define SRAM_WRITEBURST FMC_WRITE_BURST_ENABLE */ /* DMA definitions for SRAM DMA transfer */ #define __SRAM_DMAx_CLK_ENABLE __DMA2_CLK_ENABLE #define SRAM_DMAx_STREAM DMA2_Channel1 |
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