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PM0223 датащи(PDF) 82 Page - STMicroelectronics |
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PM0223 датащи(HTML) 82 Page - STMicroelectronics |
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82 / 110 page ![]() STM32L0 Core Peripherals PM0223 82/110 DocID025763 Rev 1 4.2 Nested Vectored Interrupt Controller This section describes the Nested Vectored Interrupt Controller (NVIC) and the registers it uses. The NVIC supports: • 32 interrupts. • A programmable priority level of 0-192 in steps of 64 for each interrupt. A higher level corresponds to a lower priority, so level 0 is the highest interrupt priority. • Level and pulse detection of interrupt signals. • Interrupt tail-chaining. • An external Non-Maskable Interrupt (NMI). The processor automatically stacks its state on exception entry and unstacks this state on exception exit, with no instruction overhead. This provides low latency exception handling. The hardware implementation of the NVIC registers is : 4.2.1 Accessing the STM32L0 Cortex-M0+ NVIC registers using CMSIS CMSIS functions enable software portability between different Cortex-M profile processors. To access the NVIC registers when using CMSIS, use the following functions: Table 26. NVIC register summary Address Name Type Reset value Description 0xE000E100 NVIC_ISER RW 0x00000000 Interrupt Set-enable Register on page 83. 0xE000E180 NVIC_ICER RW 0x00000000 Interrupt Clear-enable Register on page 83. 0xE000E200 NVIC_ISPR RW 0x00000000 Interrupt Set-pending Register on page 84. 0xE000E280 NVIC_ICPR RW 0x00000000 Interrupt Clear-pending Register on page 84. 0xE000E400-0xE000E4EF NVIC_IPR0-7 RW 0x00000000 Interrupt Priority Registers on page 85. Table 27. CMSIS access NVIC functions CMSIS function Description void NVIC_EnableIRQ(IRQn_Type IRQn) (1) Enables an interrupt or exception. void NVIC_DisableIRQ(IRQn_Type IRQn) (1) Disables an interrupt or exception. void NVIC_SetPendingIRQ(IRQn_Type IRQn) (1) Sets the pending status of interrupt or exception to 1. void NVIC_ClearPendingIRQ(IRQn_Type IRQn) (1) Clears the pending status of interrupt or exception to 0. uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) (1) Reads the pending status of interrupt or exception. This function returns non-zero value if the pending status is set to 1. |
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