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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PM0223 датащи(PDF) 59 Page - STMicroelectronics |
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PM0223 датащи(HTML) 59 Page - STMicroelectronics |
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59 / 110 page  DocID025763 Rev 1 59/110 PM0223 The STM32L0 Cortex-M0+ Instruction Set 80 3.5.4 CMP and CMN Compare and Compare Negative. Syntax CMN Rn, Rm CMP Rn, #imm CMP Rn, Rm where: Operation These instructions compare the value in a register with either the value in another register or an immediate value. They update the condition flags on the result, but do not write the result to a register. The CMP instruction subtracts either the value in the register specified by Rm, or the immediate imm from the value in Rn and updates the flags. This is the same as a SUBS instruction, except that the result is discarded. The CMN instruction adds the value of Rm to the value in Rn and updates the flags. This is the same as an ADDS instruction, except that the result is discarded. Restrictions For the: • CMN instruction Rn, and Rm must only specify R0-R7. • CMP instruction: – Rn and Rm can specify R0-R14. – Immediate must be in the range 0-255. Condition flags These instructions update the N, Z, C and V flags according to the result. Examples CMP R2, R9 CMN R0, R2 Rn Is the register holding the first operand. Rm Is the register to compare with. Imm Is the immediate value to compare with. |
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