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AN4088 датащи(PDF) 49 Page - STMicroelectronics |
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AN4088 датащи(HTML) 49 Page - STMicroelectronics |
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49 / 71 page ![]() DocID023072 Rev 3 49/71 AN4088 Firmware migration using the library 70 /* Configure EXTI line0 */ EXTI_InitStructure.EXTI_Line = EXTI_Line0; EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; EXTI_InitStructure.EXTI_LineCmd = ENABLE; EXTI_Init(&EXTI_InitStructure); 4.7 NVIC interrupt configuration This section describes the configuration of the NVIC interrupts (IRQ). In STM32F1 series, the NVIC supports: – up to 81 interrupts – A programmable priority level of 0-15 for each interrupt (4 bits of interrupt priority are used). A higher level corresponds to a lower priority; level 0 is the highest interrupt priority. – Grouping of priority values into group priority and sub priority fields. – Dynamic changing of priority levels. The Cortex-M3 exceptions are managed by CMSIS functions: Enable and configure the preemption priority and sub priority of the selected IRQ channels according to the Priority grouping configuration. The example below shows how to configure the CEC interrupt in STM32F1 series: /* Configure two bits for preemption priority */ NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); /* Enable the CEC global Interrupt (with higher priority) */ NVIC_InitStructure.NVIC_IRQChannel = CEC_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); In STM32F0 series, the NVIC supports: – Up to 32 interrupts – 4 programmable priority levels (2 bits of interrupt priority are used). – The priority level of an interrupt should not be changed after it is enabled. The Cortex-M0 exceptions are managed by CMSIS functions: Enable and configure the priority of the selected IRQ channels. The priority ranges between 0 and 3. Lower priority values give a higher priority. In STM32F0 series, the configuration of the CEC Interrupt source code should be updated as follows: /* Enable the CEC global Interrupt (with higher priority) */ NVIC_InitStructure.NVIC_IRQChannel = CEC_IRQn; NVIC_InitStructure.NVIC_IRQChannelPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); |
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