AN4088 datasheet(17/71 Pages) STMICROELECTRONICS

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AN4088

Peripheral migration

Peripheral access configuration: since the address mapping of some peripherals has

been changed in STM32F0 series versus STM32F1 series, you need to use different

registers to [enable/disable] or [enter/exit] the peripheral [clock] or [from reset mode].

To configure the access to a given peripheral, you have first to know to which bus this

peripheral is connected; refer to Table 8 then, depending on the action needed, program

the right register as described in Table 11 above. For example, if USART1 is connected to

the APB2 bus, to enable the USART1 clock you have to configure APB2ENR register as

follows:

RCC->APB2ENR |= RCC_APB2ENR_USART1EN;

Peripheral clock configuration: some peripherals have a dedicated clock source

independent from the system clock, and used to generate the clock required for their

operation:

ADC: in STM32F0 series, the ADC features two possible clock sources:

–

The first one is based on the PCLK; a prescaler allows you to reduce the ADC

input frequency by a factor 2 or 4 before getting to the ADC.

–

The other one is a completely new feature on stingray; a dedicated 14 MHz

oscillator (HSI14) is integrated on the chip and can be used for the ADC input

frequency.

RTC: in STM32F0 series, the RTC features three possible clock sources:

–

The first one is based on the HSE Clock; a prescaler divides its frequency by 32

before going to the RTC.

–

The second one is the LSE oscillator.

–

The third clock source is the LSI RC with a value of 40 KHz.

USB: in STM32F0x2 family, the USB may take benefit of different clock sources to

have the necessary 48 MHz:

–

The first source is the sysclk to get for example the PLL associated to a precise

HSE crystal providing an accurate 48 MHz to the peripheral.

–

The second source is the internal HSI48 associated to the CRS peripheral that

allows the HSI48 to be trimmed in run time on a precise reference clock, that is the

start of frame signal, making the USB usable without crystal.

Table 11. RCC registers used for peripheral access configuration

Bus

Comments

AHB

RCC_AHBRSTR

Used to [enter/exit] the AHB peripheral from reset

RCC_AHBENR

Used to [enable/disable] the AHB peripheral clock

APB1

RCC_APB1RSTR

Used to [enter/exit] the APB1 peripheral from reset

RCC_APB1ENR

Used to [enable/disable] the APB1 peripheral clock

APB2

RCC_APB2RSTR

Used to [enter/exit] the APB2 peripheral from reset

RCC_APB2ENR

Used to [enable/disable] the APB2 peripheral clock

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