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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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RM0312 датащи(PDF) 263 Page - STMicroelectronics |
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RM0312 датащи(HTML) 263 Page - STMicroelectronics |
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263 / 275 page  DocID022352 Rev 3 263/275 RM0312 ProxSense™ (PXS) 273 22.9.6 ProxSense Clock Control Register 2 (PXS_CKCR2) Address offset: 0x07 Reset value: 0x11 Bit 0 INCPHASE: Increases the length of each of the UP and PASS phases by one half of a clock cycle. 0: The charge-transfer phase lengths are as follows: UP phase: 0.5 + UPLEN + ANADEAD cycles of the ProxSense clock PASS phase: 0.5 + PASSLEN cycles of the ProxSense clock 1: The charge-transfer phase lengths are one half cycle longer: UP phase: 1 + UPLEN + ANADEAD cycles of the ProxSense clock PASS phase: 1 + PASSLEN cycles of the ProxSense clock Note: This bit can be modified only when CIPF = 0. 76543210 Reserved UPLEN[2:0] Reserved PASSLEN[2:0] rw rw Bit 7 Reserved Bits 6:4 UPLEN[2:0]: Length of UP phase(1) The number of cycles in the UP phase is: 0.5 + UPLEN + (0.5 * INCPHASE) + ANADEAD. Note: These bits can be modified only when PXSEN = 0. Bit 3 Reserved Bits 2:0 PASSLEN[2:0]: Length of PASS phase(1) The number of cycles in the PASS phase is: 0.5 + PASSLEN + (0.5 * INCPHASE). Note: These bits can be modified only when PXSEN = 0. 1. For UPLEN and PASSLEN, if the value is less than or equal to 4, UP phase = 0.5+UPLEN+(0.5*INCPHASE)+ANADEAD; if the value is greater than 4, UP phase = 0.5+2^(UPLEN-2)+(0.5*INCPHASE)+ANADEAD; So, if UPLEN = 5, UP phase = 0.5+8+(0.5*INCPHASE)+ANADEAD. |
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