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RM0312 датащи(PDF) 190 Page - STMicroelectronics

номер детали RM0312
подробное описание детали  STM8TL5xxx microcontroller family
PDF  275 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

RM0312 датащи(HTML) 190 Page - STMicroelectronics

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Inter-integrated circuit (I2C) interface
RM0312
190/275
DocID022352 Rev 3
19.7.6
Own address register 2 (I2C_OAR2)
Address offset: 0x05
Reset value: 0x00
19.7.7
Data register (I2C_DR)
Address offset: 0x06
Reset value: 0x00
7
6
5432
1
0
ADD2[7:1]
ENDUAL
rw
rw
Bits 7:1 ADD2[7:1]: Interface address
Bits 7:1 of address in Dual addressing mode.
Bit 0 ENDUAL: Dual addressing mode enable
0: Only OAR1 is recognized in 7-bit Addressing mode.
1: Both OAR1 and OAR2 are recognized in 7-bit Addressing mode.
7
654
3210
DR[7:0]
rw
Bits 7:0 DR[7:0]: Data register (1)(2)(3)
Byte received or to be transmitted to the bus.
– Transmitter mode: Byte transmission starts automatically when a byte is written in the DR register. A
continuous transmit stream can be maintained if the next data to be transmitted is put in DR once
the transmission is started (TXE=1)
– Receiver mode: Received byte is copied into DR (RXNE=1). A continuous transmit stream can be
maintained if DR is read before the next data is received (RXNE=1).
1. In slave mode, the address is not copied into DR.
2. Write collision is not managed (DR can be written if TXE=0).
3.
If an ARLO event occurs on ACK pulse, the received byte is not copied into DR and so cannot be read.



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