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AN4013 датащи(PDF) 21 Page - STMicroelectronics

номер детали AN4013
подробное описание детали  The purpose of this document
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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AN4013 датащи(HTML) 21 Page - STMicroelectronics

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AN4013
Timer synchronization
36
3
Timer synchronization
3.1
Timer system link
STM32 timers are linked together internally for timer synchronization or chaining. Each timer
has several internal trigger inputs and outputs. These signals allow the timer to be
connected with other timers.
Figure 4. Timer system link
3.2
Master configuration
When a timer is selected as a master timer, the corresponding trigger output signal is used
by the slave internal trigger (when configured). The trigger output can be selected from the
following list:
Reset: the UG bit from the EGR register is used as a trigger output (TRGO).
Enable: the counter enable signal is used as a trigger output (TRGO). It is used to start
several timers at the same time, or to control a window in which a slave timer is
enabled.
Update: the update event is selected as trigger output (TRGO). For example, a master
timer can be used as a prescaler for a slave timer.
Compare pulse: the trigger output sends a positive pulse when the CC1IF flag is to be
set (even if it was already high) as soon as a capture or a compare match occurs.
OC1Ref: OC1REF signal is used as trigger output (TRGO).
OC2Ref: OC2REF signal is used as trigger output (TRGO).
OC3Ref: OC3REF signal is used as trigger output (TRGO).
OC4Ref: OC4REF signal is used as trigger output (TRGO).



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