UPD70F3003A datasheet(17/44 Pages) NEC

номер детали	UPD70F3003A

подробное описание детали	V853TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLER

PDF	44 Pages

Scroll/Zoom	100%

производитель	NEC [NEC]

домашняя страница	http://www.nec.com/

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µPD70F3003A, 70F3025A

Data Sheet U13189EJ3V0DS00

Data Retention Characteristics (TA = –40 to +85

°C)

Parameter

Symbol

Condition

MIN.

TYP.

MAX.

Unit

Data hold voltage

VDDDR

STOP mode

1.5

5.5

Data hold current

IDDDR

VDD = VDDDR

–40

°C ≤ TA ≤ +50°C

0.2 VDDDR

µA

°C < TA ≤ 85°C

0.2 VDDDR

200

µA

Supply voltage rise time

tRVD

200

µs

Supply voltage fall time

tFVD

200

µs

Supply voltage hold time

tHVD

0ms

(vs. STOP mode setting)

STOP mode release signal input time

tDREL

0ns

Data hold input voltage, high

VIHDR

Note

0.9 VDDDR

VDDDR

Data hold input voltage, low

VILDR

Note

0.1 VDDDR

Note

P02/TCLR11, P03/TI11, P04/INTP110-P07/INTP113, P12/TCLR12, P13/TI12, P14/INTP120, P15/INTP121/

SO2, P16/INTP122/SI2, P17/INTP123/SCK2, P23/RXD0/SI0, P24/SCK0, P26/RXD1/SI1, P27/SCK1, P32/

TCLR32, P33/TI13, P34/INTP130, P35/INTP131/SO3, P36/INTP132/SI3, P37/INTP133/SCK3, P112/

TCLR14, P113/TI14, P114/INTP140-P117/INTP143, RESET, NMI, MODE, X1

Remark

TYP. value is a value for your reference at TA = 25

°C and VDD = 5.0 V.

tHVD

VDD

tFVD

tRVD

tDREL

VDD

VDDDR

RESET (input)

VIHDR

NMI (input)

(Release by falling edge)

VIHDR

VILDR

NMI (input)

(Release by rising edge)

STOP mode is set (at fifth clock after PSC register has been set).

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