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AN2335 датащи(PDF) 29 Page - STMicroelectronics

номер детали AN2335
подробное описание детали  This document is intended to give application
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производитель  STMICROELECTRONICS [STMicroelectronics]
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AN2335 датащи(HTML) 29 Page - STMicroelectronics

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AN2335
Free-Fall and Wake-Up Registers
29/40
8.7
FF_WU_SRC_2 (35h)
Free-fall and wake-up source register for interrupt 2. Read only register. Refer to
FF_WU_SRC_1 for details.
Reading at this address clears FF_WU_SRC_2 register and the FF_WU2 interrupt and al-
lows the refreshment of data in the FF_WU_SRC_2 register if the latched option was chosen.
8.8
FF_WU_THS_2 (36h)
Free-fall, wake-up threshold for interrupt source 2.
DCRM bit and THS6 to THS0 behave exactly like bit in FF_WU_THS_1 but they are applied
to interrupt source 2.
x
IA
ZH
ZL
YHYLXHXL
IA
Interrupt Active. Default value: 0
(0: no interrupt has been generated;
1: one or more interrupt event has been generated)
ZH
Z High. Default value: 0
(0: no interrupt; 1: ZH event has occurred)
ZL
Z Low. Default value: 0
(0: no interrupt; 1: ZL event has occurred)
YH
Y High. Default value: 0
(0: no interrupt; 1: YH event has occurred)
YL
Y Low. Default value: 0
(0: no interrupt; 1: YL event has occurred)
XH
X High. Default value: 0
(0: no interrupt; 1: XH event has occurred)
XL
X Low. Default value: 0
(0: no interrupt; 1: XL event has occurred)
DCRM
THS6
THS5
THS4
THS3
THS2
THS1
THS0
DCRM
Duration counter reset mode selection. Default value: 0
(0: counter reset; 1: counter decremented)
THS6, THS0
Free-fall / wake-up Threshold: default value: 000 0000



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