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TDA7493 датащи(PDF) 15 Page - STMicroelectronics |
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TDA7493 датащи(HTML) 15 Page - STMicroelectronics |
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15 / 30 page ![]() TDA7493 Applications information Doc ID 14570 Rev 6 15/30 5.5 Internal clock and external clock The clock of the class-D amplifier can be generated internally or it can be synchronous with the external clock. If two or more class-D amplifiers are used in the same system, it is better to have all devices working at the same frequency. This is realized by using one TDA7493 as clock master and the others as slaves. All SYNCLK pins are connected together as shown in Figure 8. In master mode or with a single TDA7493, the output switching frequency is controlled by the resistor connected to pin ROSC. The switching frequency is: fSW = 10 6 / (R OSC * 64 + 840) where ROSC is in kΩ and fSW is in kHz. In this configuration pin SYNCLK is an output whose frequency is also determined by ROSC: fSYNCLK = 10 6 / (R OSC * 32 + 420) = 2 * fSW Note: ROSC should be lower than 60 kΩ in master mode to avoid operating in error mode. In slave mode, pin ROSC can be floating to force pin SYNCLK as input in order to accept the master clock. The switching frequency in this mode is: fSW = fSYNCLK / 2 Figure 8. Master and slave modes Table 9. Master and slave mode Mode Pin ROSC Pin SYNCLK Master ROSC < 60 kΩ Output Slave Floating Input Master Slave ROSC SYNCLK SYNCLK ROSC Output Input TDA7493 TDA7493 COSC 100 nF 39 k Ω ROSC |
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