ICS1892 datasheet(111/148 Pages) ICST

111 / 148 page

Chapter 9

Pin Diagram, Listings, and Descriptions

ICS1892, Rev. D, 2/26/01

February 26, 2001

111

ICS1892

RXDV

Output

Receive Data Valid.

The ICS1892 asserts RXDV to indicate to the MAC/repeater that data is

available on the MII Receive Bus (RXD[3:0]). The ICS1892:

• Asserts RXDV after it detects and recovers the Start-of-Stream

delimiter, /J/K/. (For the timing reference, see Chapter 10.5.6, “MII /

100M Stream Interface: Synchronous Receive Timing”.)

• De-asserts RXDV after it detects either the End-of-Stream delimiter

(/T/R/) or a signal error.

Note: RXDV is synchronous with the Receive Data Clock, RXCLK.

RXER

Output

Receive Error.

In 100Base-TX mode, the ICS1892 asserts a signal on the RXER pin

under two conditions:

• When errors are detected during the reception of valid frames.

• When a False Carrier is detected.

Note:

1. The ICS1892 asserts a signal on RXER upon detection of a False

Carrier so that repeater applications can prevent the propagation of a

False Carrier.

2. RXER always transitions synchronously with RXCLK.

RXTRI

Input

Receive (Interface), Tri-State.

The input on this pin is from a MAC. When the signal on this pin is logic:

• Low, the MAC indicates that it is not in a tri-state condition.

• High, the MAC indicates that it is in a tri-state condition. In this case,

the ICS1892 acts to ensure that only one PHY is active at a time.

• PHY address 00 will also act as RXTRI.

TXCLK

Transmit Clock.

The ICS1892 generates this clock signal to synchronize the transfer of

data from the MAC/Repeater Interface to the ICS1892. When the mode is:

• 10Base-T, the TXCLK frequency is 2.5 MHz.

• 100Base-TX, the TXCLK frequency is 25 MHz.

TXD0,

TXD1,

TXD2,

TXD3

45,

46,

47,

Input

Transmit Data 0–3.

• TXD0 is the least-significant bit and TXD3 is the most-significant bit of

the MII transmit data nibble received from the MAC/repeater.

• While the ICS1892 asserts TXEN, the signals on the TXD0–TXD3 pins

are sampled by the ICS1892 synchronously on the rising edges of

TXCLK.

Table 9-6.

MAC/Repeater Interface Pins: Media Independent Interface (MII) (Continued)

Name

Number

Type

Pin Description

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