ICS1892 datasheet(109/148 Pages) ICST

109 / 148 page

Chapter 9

Pin Diagram, Listings, and Descriptions

ICS1892, Rev. D, 2/26/01

February 26, 2001

109

ICS1892

9.2.4

MAC/Repeater Interface Pins

This section lists pin descriptions for each of the following interfaces

• Section 9.2.4.1, “MAC/Repeater Interface Pins for Media Independent Interface”

• Section 9.2.4.2, “MAC/Repeater Interface Pins for 100M Symbol Interface”

• Section 9.2.4.3, “MAC/Repeater Interface Pins for 10M Serial Interface”

• Section 9.2.4.4, “MAC/Repeater Interface Pins for Link Pulse Interface”

9.2.4.1

MAC/Repeater Interface Pins for Media Independent Interface

Table 9-6 lists the MAC/Repeater Interface pin descriptions for the MII.

Table 9-6.

MAC/Repeater Interface Pins: Media Independent Interface (MII)

Name

Number

Type

Pin Description

COL

Output

Collision (Detect).

The ICS1892 asserts a signal on the COL pin when the ICS1892 detects

receive activity while transmitting (that is, while the TXEN signal is

asserted by the MAC/repeater, that is, when transmitting). When the

mode is:

• 10Base-T, the ICS1892 detects receive activity by monitoring the

un-squelched MDI receive signal.

• 100Base-TX, the ICS1892 detects receive activity when there are two

non-contiguous zeros in any 10-bit symbol derived from the MDI

receive data stream.

Note:

1. The signal on the COL pin is not synchronous to either RXCLK or

TXCLK.

2. In full-duplex mode, the COL signal is disabled and always remains

low.

3. The COL signal is asserted as part of the signal quality error (SQE)

test. This assertion can be suppressed with the SQE Test Inhibit bit (bit

18.2).

CRS

Output

Carrier Sense.

• In half-duplex mode, the ICS1892 asserts a signal on the CRS pin

when the ICS1892 detects either receive or transmit activity.

• In full-duplex mode and Repeater mode, the ICS1892 asserts a signal

on the CRS pin only when the ICS1892 detects receive activity.

Note: The signal on the CRS pin is not synchronous to either RXCLK or

TXCLK.

MDC

Input

Management Data Clock.

The ICS1892 uses the signal on the MDC pin to synchronize the transfer

of management information between the ICS1892 and the Station

Management Entity (STA), using the serial MDIO data line. The MDC

signal is sourced by the STA.

ICS1892 датащи(PDF) 109 Page - Integrated Circuit Systems

ICS1892 датащи(HTML) 109 Page - Integrated Circuit Systems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL