HDM8515P datasheet(67/75 Pages) HYNIX

номер детали	HDM8515P

подробное описание детали	DVB/DSS Compliant Receiver

PDF	75 Pages

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производитель	HYNIX [Hynix Semiconductor]

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A1. Loop Filter Programming Application Note

To illustrate that the symbol timing recovery loop and the carrier phase recovery loop are both

programmable, several simulations were performed with different loop parameter conditions. These

simulations were performed with a symbol rate of two samples per symbol, corresponding to 30M

symbols-per-second if a 60MHz clock were utilized.

Figure A1 illustrates the transient response of the symbol phase with three different loop conditions

(K1=5, K2=10; K1=4, K2=9; and K1=8, K2=7). The vertical scale represents phase over a 360

degree range (524,287 to -524,288). All test cases were run at high signal -to-noise ratio. The

highest gain condition could be used for fast acquisition as well as for steady state with high code

rate conditions, while the intermediate gain is a suitable steady state setting for rate 1/2 codes

(minimum Eb/N0 of 4 dB). The lowest gain setting corresponds to ultra low loop bandwidth and

may be considered for maintaining lock without phase jumps during deep signal fades.

FIGURE A1: SYMBOL TIMING RECOVERY TRANSIENT RESPONSE

HDM8515P датащи(PDF) 67 Page - Hynix Semiconductor