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HDM8515P датащи(PDF) 35 Page - Hynix Semiconductor

номер детали HDM8515P
подробное описание детали  DVB/DSS Compliant Receiver
PDF  75 Pages
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производитель  HYNIX [Hynix Semiconductor]
домашняя страница  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HDM8515P датащи(HTML) 35 Page - Hynix Semiconductor

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35
3.8 DBS Receiver
The HDM8515 DVB Demodulator including a dual A/D converter and the MPEG-2 decoder provide
the core digital processing technology for a DBS receiver conforming with the DVB standard.
8
Clock
Da ta
M C68306
(M C68340)
Host Proce ssor
L-B and
Tuner
4 80 MHz
Do wn-
convert er
Co arse Tuning Step Frequ ency Cont rol
L ow
Pa ss
Filter
WB
AGC
4 80 MHz
Loo p
Filter
SL171 0
Serial
Inter fa ce
BSFC77GV6
8
Conditional
Access
Inte rfa c e
AGC 2
AGC 1
Fixed F requencyP LL Control
3
IF
I
Q
HDM8515
MPEG-2
Demultiplexer
DRAM
Video
Audio
FIGURE 19: TYPICAL SET TOP BOX DEMODULATOR
A tuner accepts an L-band RF input from the antenna/LNB assembly located outside the building.
A host processor controls the tuner to the nominal center frequency of the target signal. Baseband
I and Q outputs from the downconverter are applied to an A/D converter pair which is sampled at a
fixed rate, 90MHz as illustrated in this example. The tuner is required to filter the received
baseband signal to a bandwidth less than half the sampling rate, but is not required to perform
matched filtering.
Once the HDM8515 has locked to the target signal, the host processor may read the internal
registers to determine the steady state frequency error. This error would be used to make period
corrections to the programmed frequency of the tuner PLL.
The HDM8515 provides an output which can be used to control the analog AGC in the tuner. This
digital signal must be filtered and amplified before applying it to the AGC control element. When
the loop is closed, the signal applied to the A/D converters is optimally scaled.



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