December 2008

Specification Update

15

Status:

No Fix.

16.

Ethernet MAC Does Not Detect Transmit FIFO Under-runs Reliably

Problem:

There is a transmit race condition in the 10/100 Ethernet MAC. The race condition

happens when the 10/100 Ethernet MACs transmit FIFO is filled on the same transmit

clock as the transmit FIFO under-run occurs on the line side. If the race condition were

to happen, the 10/100 MAC may end up appending four more bytes of indeterminate

data to the Ethernet frame that is transmitted on the line. The FCS will be generated on

the frame that includes the four extra bytes so the receiver will not detect any problem

with the Frame.

Currently no customers have experienced this problem or a problem with similar

symptoms with years of testing and millions of units productized and deployed.

wall, header conversion) resulting in the transmission of corrupt frames. This problem

is detectable in applications that run any upper-layer protocol. For example, Layer 3/4

in the network application stack will detect this problem (because of IP checksum error)

and drop the packet before it reaches the application. This error is undetectable by the

receiver.

Status:

No Fix.

17.

Expansion Bus Bootup Failure

Problem:

EX_DATA is switching between input and output during bootup sequence. As the output

buffer is always enabled, the bootup code cannot be driven into the Intel XScale

processor successfully.

transaction through Expansion Bus. The IXP43X product line of network processors

continues to drive the EX_DATA[15:0] even when EX_RD_N is asserted. This causes a

bus contention with the target device on the Expansion Bus. The IXP43X product line of

network processors also drives the EX_DATA[15:0] with values from EX_ADDR[15:0]

appearing as if it is attempting to perform a multiplexed mode read transaction.

However, the EX_ALE were not asserted, and it does not release the EX_DATA for the

target device.

Status:

Fixed.

18.

Incorrect Reset Value of GPIO_INR[0] and GPIO_ISR[0]

Problem:

GPIO[0] has a weak pull-up to 3.3V, if the GPIO0 is configured as input. The weak

pull-up will appear internally and propagate all the way to the interrupt status register,

INTR_ST. It will interrupt only the Intel XScale processor via either IRQ or FIQ

(INTR_EN bit 6) that corresponds to the enabled GPIO0.

Processors does not indicate all zero. The read back value of the GPIO_INR[15:1] and

GPIO_ISR[15:1] are zeros, while the GPIO_INR[0] and GPIO_ISR[0] are ones.

Status:

Fixed.

19.

USB Under-run errors when both USB ports perform Interrupt OUT

transfers.

Problem:

Under-run errors are noticed on USB ports when both the ports are performing

Interrupt OUT transfers. Single port will not report any error. The under-run error

notifies that the host is ready to transmit, but the data is not available in transmit

buffer.

instead. The Interrupt OUT pipe is optional. If no Interrupt OUT endpoint is declared