WM1811A datasheet(91/328 Pages) WOLFSON

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Production Data

WM1811A

PD, November 2013, Rev 4.1

When the noise gate is activated, the WM1811A gradually attenuates the AIF1 input signal paths until

each is entirely muted. When the signal level increases, and the noise gate is de-activated, the gain

will return to the AIF1DAC1L_VOL and AIF1DAC1R_VOL digital gain settings. The un-mute behaviour

can be immediate or gradual; this is determined by the AIF1DAC1_MUTERATE and

AIF1DAC1_UNMUTE_RAMP registers described in Table 41.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1072 (0430h)

AIF1 DAC1

Noise Gate

6:5

AIF1DAC1_

NG_HLD

[1:0]

AIF1DAC input path Noise Gate Hold Time

(delay before noise gate is activated)

00 = 30ms

01 = 125ms

10 = 250ms

11 = 500ms

3:1

AIF1DAC1_

NG_THR

[2:0]

100

AIF1DAC input path Noise Gate Threshold

000 = -60dB

001 = -66dB

010 = -72dB

011 = -78dB

100 = -84dB

101 = -90dB

110 = -96dB

111 = -102dB

AIF1DAC1_

NG_ENA

AIF1DAC input path Noise Gate Enable

0 = Disabled

1 = Enabled

Table 42 AIF1 Input Path Noise Gate Control

AIF1 - INPUT PATH MONO MIX CONTROL

A digital mono mix can be selected on the AIF1 input channels. The mono mix is generated as the

sum of the Left and Right AIF channel data. When the mono mix function is enabled, the combined

mono signal is applied to the Left channel and the Right channel of the AIF1 signal processing and

digital mixing paths. To prevent clipping, 6dB attenuation is applied to the mono mix.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1056 (0420h)

AIF1 DAC1

Filters (1)

AIF1DAC1_

MONO

AIF1DAC input path Mono Mix Control

0 = Disabled

1 = Enabled

Table 43 AIF1 Input Path Mono Mix Control

AIF2 - OUTPUT PATH VOLUME CONTROL

A digital volume control is provided on the AIF2 output signal paths, allowing attenuation in the range -

71.625dB to +17.625dB in 0.375dB steps. The level of attenuation for an eight-bit code X is given by:

0.375

 (X-192) dB for 1  X  239;

MUTE for X = 0

+17.625dB for 239

 X  255

The AIF2ADC_VU bits control the loading of digital volume control data. When this bit is set to 0, the

AIF2ADCL_VOL and AIF2ADCR_VOL control data will be loaded into the respective control register,

but will not actually change the digital gain setting.

The AIF2ADCL_VOL and AIF2ADCR_VOL gain settings are updated when a 1 is written to

AIF2ADC_VU. This makes it possible to update the gain of left and right channels simultaneously.

Digital volume control is also possible within the digital core functions, after the audio signal has

passed through the AIF2 output digital mixers. See “Digital Mixing” for further details.

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