AT45DB321E datasheet(6/73 Pages) ETC2

6 / 73 page

AT45DB321E

8784F–DFLASH–11/2013

Device Operation

The device operation is controlled by instructions from the host processor. The list of instructions and their associated

opcodes are contained in Table 15-1 on page 40 through Table 15-4 on page 41. A valid instruction starts with the falling

edge of CS followed by the appropriate 8-bit opcode and the desired buffer or main memory address location. While the

CS pin is low, toggling the SCK pin controls the loading of the opcode and the desired buffer or main memory address

location through the SI (Serial Input) pin. All instructions, addresses, and data are transferred with the Most Significant

Bit (MSB) first.

Three address bytes are used to address memory locations in either the main memory array or in one of the SRAM

buffers. The three address bytes will be comprised of a number of dummy bits and a number of actual device address

bits, with the number of dummy bits varying depending on the operation being performed and the selected device page

size. Buffer addressing for the standard DataFlash page size (528 bytes) is referenced in the datasheet using the

terminology BFA9 - BFA0 to denote the 10 address bits required to designate a byte address within a buffer. The main

memory addressing is referenced using the terminology PA12 - PA0 and BA9 - BA0, where PA12 - PA0 denotes the

13 address bits required to designate a page address, and BA9 - BA0 denotes the 10 address bits required to designate

a byte address within the page. Therefore, when using the standard DataFlash page size, a total of 23 address bits are

used.

For the “power of 2” binary page size (512 bytes), the buffer addressing is referenced in the datasheet using the

conventional terminology BFA8 - BFA0 to denote the nine address bits required to designate a byte address within a

buffer. Main memory addressing is referenced using the terminology A21 - A0, where A21 - A9 denotes the 13 address

bits required to designate a page address, and A8 - A0 denotes the nine address bits required to designate a byte

address within a page. Therefore, when using the binary page size, a total of 22 address bits are used.

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