AT25DF321A datasheet(36/53 Pages) ETC2

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3686F–DFLASH–1/2014

AT25DF321A

12.

Other Commands and Functions

12.1

Reset

In some applications, it may be necessary to prematurely terminate a program or erase cycle early rather than wait the

hundreds of microseconds or milliseconds necessary for the program or erase operation to complete normally. The Reset

command allows a program or erase operation in progress to be ended abruptly and returns the device to an idle state. Since the

need to reset the device is immediate, the Write Enable command does not need to be issued prior to the Reset command being

issued. Therefore, the Reset command operates independently of the state of the WEL bit in the Status Register.

The Reset command can only be executed if the command has been enabled by setting the Reset Enabled (RSTE) bit in the

Status Register to a logical “1”. If the Reset command has not been enabled (the RSTE bit is in the logical “0” state), then any

attempts at executing the Reset command will be ignored.

To perform a Reset, the CS pin must first be asserted and the opcode of F0h must be clocked into the device. No address bytes

need to be clocked in, but a confirmation byte of D0h must be clocked into the device immediately after the opcode. Any

additional data clocked into the device after the confirmation byte will be ignored. When the CS pin is deasserted, the program

or erase operation currently in progress will be terminated within a time of tRST. Since the program or erase operation may not

complete before the device is reset, the contents of the page being programmed or the block being erased cannot be guaranteed

to be valid.

The Reset command has no effect on the states of the Sector Protection Registers, the Sector Lockdown Registers, or the

SPRL, RSTE, and SLE bits in the Status Register. The WEL, PS, and ES bits, however, will be reset back to their default

states. If a Reset operation is performed while a sector is erase suspended, the suspend operation will abort, and the contents of

the block being erased in the suspended sector will be left in an undefined state. If a Reset is performed while a sector is

program suspended, the suspend operation will abort, and the contents of the page that was being programmed and

subsequently suspended will be undefined. The remaining pages in the 64-Kbyte sector will retain their previous contents.

The complete opcode and confirmation byte must be clocked into the device before the CS pin is deasserted, and the CS pin

must be deasserted on an even byte boundary (multiples of eight bits); otherwise, no Reset operation will be performed.

Figure 12-1.Reset

SCK

MSB

1111000

OPCODE

CONFIRMATION BYTE IN

10 11

814 15

MSB

110100

HIGH-IMPEDANCE

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