AT25DF081A datasheet(31/54 Pages) ETC2

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8715C–SFLSH–1/2013

AT25DF081A

11.

Status Register Commands

11.1 Read Status Register

The two-byte Status Register can be read to determine the device’s ready/busy status, as well as the status of

many other functions such as Hardware Locking and Software Protection. The Status Register can be read at any

time, including during an internally self-timed program or erase operation.

To read the Status Register, the CS pin must first be asserted and the opcode of 05h must be clocked into the

device. After the opcode has been clocked in, the device will begin outputting Status Register data on the SO pin

during every subsequent clock cycle. After the second byte of the Status Register has been clocked out, the

sequence will repeat itself starting again with the first byte of the Status Register as long as the CS pin remains

asserted and the clock pin is being pulsed. The data in the Status Register is constantly being updated, so each

repeating sequence will output new data. The RDY/BSY status is available for both bytes of the Status Register

and is updated for each byte.

At clock frequencies above fCLK, the first two bytes of data output from the Status Register will not be valid. There-

fore, if operating at clock frequencies above fCLK, at least four bytes of data must be clocked out from the device in

order to read the correct values of both bytes of the Status Register.

Deasserting the CS pin will terminate the Read Status Register operation and put the SO pin into a high-imped-

ance state. The CS pin can be deasserted at any time and does not require that a full byte of data be read.

Notes: 1. Only bit 7 of Status Register Byte 1 will be modified when using the Write Status Register Byte 1 command.

2. R/W = Readable and writeable

R = Readable only

Table 11-1.

Status Register Format – Byte 1

Bit(1)

Name

Type(2)

Description

SPRL

Sector Protection Registers Locked

R/W

Sector Protection Registers are unlocked (default)

Sector Protection Registers are locked

RES

Reserved for future use

EPE

Erase/Program Error

Erase or program operation was successful

Erase or program error detected

WPP

Write Protect (WP) Pin Status

WP is asserted

WP is deasserted

3:2

SWP

Software Protection Status

All sectors are software unprotected (all Sector

Protection Registers are 0)

Some sectors are software protected. Read

individual Sector Protection Registers to determine

which sectors are protected

Reserved for future use

All sectors are software protected (all Sector

Protection Registers are 1 – default)

WEL

Write Enable Latch Status

Device is not write enabled (default)

Device is write enabled

RDY/BSY

Ready/Busy Status

Device is ready

Device is busy with an internal operation

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