CY7C0430V
PRELIMINARY
32
001101
mar2_0_upcnt
Up count M2A_r1w0r0.
001111
mar2_1_downcnt
Down count M2A_r0w1r1.
001110
mar2_0_downcnt
Down count M2A_r1w0r0.
001010
mar2_read
Read all 0s.
001011
chkr_w
Port 1 writes topological checkerboard data to memory.
001001
chkr_r
All ports read topological checkerboard data.
001000
n_chkr_w
Port 1 write inverse topological checkerboard data.
011000
n_chkr_r
All ports read inverse topological checkerboard data.
011001
uaddr_zeros2
Port 2 write all zeros to memory using Unique Address Algorithm (UAA).
011011
uaddr_write2
Port 2 writes every address value into its memory location (UAA).
011010
uaddr_read2
All ports read UAA data.
011110
uaddr_ones2
Port 2 writes all ones to memory.
011111
n_uaddr_write2
Port 2 writes inverse address value into memory.
011101
n_uaddr_read2
All ports read inverse UAA data.
011001
uaddr_zeros3
Port 3 write all zeros to memory using Unique Address Algorithm (UAA).
011011
uaddr_write3
Port 3 writes every address value into its memory location (UAA).
011010
uaddr_read3
All ports read UAA data.
011110
uaddr_ones3
Port 3 writes all ones to memory.
011111
n_uaddr_write3
Port 3 writes inverse address value into memory.
011101
n_uaddr_read3
All ports read inverse UAA data.
011001
uaddr_zeros4
Port 4 write all zeros to memory using Unique Address Algorithm (UAA).
011011
uaddr_write4
Port 4 writes every address value into its memory location (UAA).
011010
uaddr_read4
All ports read UAA data.
011110
uaddr_ones4
Port 4 writes all ones to memory.
011111
n_uaddr_write4
Port 4 writes inverse address value into memory.
011101
n_uaddr_read4
All ports read inverse UAA data.
110010
complete
Test complete.
Table 8. MBIST Control Register (MCR)
MCR[1:0]
Mode
00
Non-Debug
01
Debug
10
Reserved
11
Reserved
Table 7. MBIST Control States
States Code
State Name
Description
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