CS4953 datasheet(25/44 Pages) CIRRUS

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CS4952/53

DS223PP2

VREF

The CS4952/3 can operate with or without the aid

of an external voltage reference. The CS4952/3 is

designed with an internal voltage reference genera-

tor that provides a VREFOUT signal. The internal

voltage reference is utilized by electrically con-

necting the VREFOUT and VREFIN pins. VRE-

FIN can also be connected to an external precision

1.235 volt reference. In either case, VREFIN is to

be decoupled to ground with a 0.1

µF capacitor.

Decoupling should be applied as close to the device

pin as possible.

ISET

All four of the CS4952/3 digital to analog converter

DACs are output current normalized with a com-

mon ISET device pin. The DAC output current per

bit is determined by the size of the resistor connect-

ed between ISET and electrical ground. Typically a

10 k

Ω±1% metal film resistor should be used. The

ISET resistance can be changed by the user to ac-

commodate varying video output attenuation via

post filters and also to suit individual preferred per-

formance.

In conjunction with the ISET value, the user may

also independently vary the chroma, luma and col-

orburst amplitude levels via host addressable con-

trol register bits that are used to control internal

digital amplifiers. The DAC output levels are de-

fined by the following operations:

VREFIN/RISET = IREF

1.235 V/10 k

Ω = 123.5 µA

CVBS37/Y/C Outputs:

VOUT (max) = IREF

× (8/15) × 511 × 37.5 Ω =

1.262 V

CVBS75 Output:

VOUT (max) = IREF

× (4/15) × 511 × 75 Ω =

1.262 V

DACs

The CS4952/3 is equipped with 4 independent vid-

eo grade current output digital to analog converters.

They are 9-bit DACs operating at a 27 MHz two

times oversampling rate. All four DACs are dis-

abled and put in a low power mode upon RESET.

All four DACs can be individually powered down

and disabled. The output current per bit of all four

DACs is determined by the size of resistor connect-

ed between the ISET pin and electrical ground.

Luminance DAC

The Y pin is driven from a 9-bit 27 MHz current

output DAC that internally receives the Y or lumi-

nance portion of the video signal (black and white

intensity and syncronization information only). Y

is designed to drive proper video levels into a

37.5

Ω load. Reference the detailed electrical sec-

tion of this data sheet for the exact Y digital to an-

alog AC and DC performance data. A Y_EN

enable control bit in the DAC register (0x08) is

provided to enable or disable the luminance DAC.

For a complete disable and lower power operation

the Luminance DAC can be totally shut down via

the Y_PD control bit in the DAC register (0x08). In

this mode turn-on through the control register will

not be instantaneous.

Chrominance DAC

The C pin is driven from a 9-bit 27 MHz current

output DAC that internally receives the C or

chrominance portion of the video signal (color

only). C is designed to drive proper video levels

into a 37.5

Ω load. Reference the detailed electrical

section of this data sheet for the exact C digital to

analog AC and DC performance data. A C_EN en-

able control register bit in the DAC register (0x08)

is provided to enable or disable the Chrominance

DAC. For a complete disable and lower power op-

eration the Chrominance DAC can be totally shut

down via the C_PD control register bit in the DAC

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