CS4923 datasheet(50/56 Pages) CIRRUS

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CS4923/4/5/6/7/8/9

DS262F2

FILT2—Phase Locked Loop Filter: Pin 32

Connects to an external filter for the on-chip phase-locked loop. This pin does not meet Cirrus

Logic’s ESD tolerance of 2000 V using the human body model. This pin will tolerate ESD of

1000 V using the human body model.

CLKIN—Master Clock Input: Pin 30

CS4923/4/5/6/7/8/9 clock input. When in internal clock mode (CLKSEL == DGND), this input

is connected to the internal PLL from which all internal clocks are derived. When in external

clock mode (CLKSEL == VD), this input is connected to the DSP clock. INPUT

CLKSEL—DSP Clock Select: Pin 31

This pin selects the clock mode of the CS4923/4/5/6/7/8/9. When CLKSEL is low, CLKIN is

connected to the internal PLL from which all internal clocks are derived. When CLKSEL is

high CLKIN is connected to the DSP clock. INPUT

DATA7, EMAD7, GPIO7—Pin 8

DATA6, EMAD6, GPIO6—Pin 9

DATA5, EMAD5, GPIO5—Pin 10

DATA4, EMAD4, GPIO4—Pin 11

DATA3, EMAD3, GPIO3—Pin 14

DATA2, EMAD2, GPIO2—Pin 15

DATA1, EMAD1, GPIO1—Pin 16

DATA0, EMAD0, GPIO0—Pin 17

In parallel host mode, these pins provide a bidirectional data bus. If a serial host mode is

selected, these pins can provide a multiplexed address and data bus for connecting an 8-bit

external memory. Otherwise, in serial host mode, these pins can act as general-purpose input or

output pins that can be individually configured and controlled by the DSP.

BIDIRECTIONAL - Default: INPUT

A0, SCCLK—Host Parallel Address Bit Zero or Serial Control Port Clock: Pin 7

In parallel host mode, this pin serves as one of two address input pins used to select one of four

parallel registers. In serial host mode, this pin serves as the serial control clock signal,

specifically as the SPI clock input or the I2C clock input. INPUT

A1, SCDIN—Host Parallel Address Bit One or SPI Serial Control Data Input: Pin 6

In parallel host mode, this pin serves as one of two address input pins used to select one of four

parallel registers. In SPI serial host mode, this pin serves as the data input. INPUT

RD, R/W, EMOE, GPIO11—Host Parallel Output Enable or Host Parallel R/W or External

Memory Output Enable or General Purpose Input & Output Number 11: Pin 5

In Intel parallel host mode, this pin serves as the active-low data bus enable input. In Motorola

parallel host mode, this pin serves as the read-high/write-low control input signal. In serial host

mode, this pin can serve as the external memory active-low data-enable output signal. Also in

serial host mode, this pin can serve as a general purpose input or output bit.

BIDIRECTIONAL - Default: INPUT

CS4923 датащи(PDF) 50 Page - Cirrus Logic