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CS4215 датащи(PDF) 22 Page - Cirrus Logic |
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CS4215 датащи(HTML) 22 Page - Cirrus Logic |
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22 / 52 page ![]() of 128 (80 Hex) is considered analog zero for the 8-bit unsigned format. A non-linear coding scheme is used for the com- panded formats as shown in Figure 14. This scheme is compatible with CCITT G.711. Com- panding uses more precision at lower amplitudes at the expense of less precision at higher ampli- tudes. µ-Law is equivalent to 13 bits at low signal levels and A-Law is equivalent to 12 bits. This low-level dynamic range is obtained at the expense of large-signal dynamic range which, for both µ-Law and A-Law, is equivalent to 6 bits. The CS4215 internally operates at 16 bits. The companded data is expanded to the upper 13 (12) bits for the DACs and compressed from the upper 13 (12) bits to 8 bits for the ADCs. Data Time Slot 1&2, Left Channel Audio Data Time slot 1 and 2 contain audio data for the left channel. In mono modes, only the left channel data is used, however both the right and left output DACs are driven. In 8-bit modes, only time slot 1 is used for the data. Data Time Slot 3&4, Right Channel Audio Data Time slot 3 and 4 contains audio data for the right channel. In mono modes, the right ADC outputs zero and the right DAC uses the left digital data. In 8-bit modes, only time slot 3 is used for the data. Figure 15 summarizes all the time slot bit alloca- tions for the 4 data modes and for control mode. Reset RESET going low causes all the internal control registers to be set to the states shown with each register description. RESET must be brought low and high at least once after power up. RESET returning high causes the CS4215 to execute an offset calibration cycle. RESET or D/C returning high should occur at least 50 ms after the power supply has stabilized to allow the voltage refer- ence to settle. Data Time Slot 5, Output Setting D7 D6 D5 D4 D3 D2 D1 D0 HE LE LO5 LO4 LO3 LO2 LO1 LO0 00111111 Register Reset (R) BIT NAME VALUE FUNCTION LO5-0 Left Channel Output Attenuation Setting 1 1 1 1 1 1 63 R 1.5dB attenuation steps. LO5 is the MSB. 0 = no attenuation. 111111 = -94.5dB LE Line Output Enable 0 1 R Analog line outputs off (muted). Analog line outputs on. HE Headphone Output Enable 0 1 R Headphone output off (muted). Headphone output on. 0 +FS -FS DIGITAL CODE A-Law: 2Ah 15h 95h AAh 7Fh/FFh 55h/D5h 00h 3Fh BFh 80h u-Law: Figure 14. Companded Data Formats CS4215 22 DS76F2 |
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