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THS4532IPW датащи(PDF) 4 Page - National Semiconductor (TI) |
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THS4532IPW датащи(HTML) 4 Page - National Semiconductor (TI) |
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4 / 44 page ![]() THS4532 SLOS829 – FEBRUARY 2013 www.ti.com ELECTRICAL CHARACTERISTICS: VS = 2.7 V (continued) Test conditions at TA = 25°C, VS+ = 2.7 V, VS– = 0 V, VOCM = open, VOUT = 2 VPP, RF = 2 kΩ, RL = 2 kΩ differential, G = 1 V/V, single-ended input, differential output, and input and output referenced to mid-supply, unless otherwise noted. TEST PARAMETER CONDITIONS MIN TYP MAX UNITS LEVEL(1) DC PERFORMANCE Open-loop voltage gain (AOL) 100 113 dB A TA = +25°C ±80 ±400 A TA = 0°C to +70°C ±715 Input-referred offset voltage µV TA = –40°C to +85°C ±855 B TA = –40°C to +125°C ±1300 TA = 0°C to +70°C ±2 ±7 Input offset voltage drift(2) TA = –40°C to +85°C ±2 ±7 µV/°C B TA = –40°C to +125°C ±3 ±9 TA = +25°C 200 250 A TA = 0°C to +70°C 275 Input bias current nA TA = –40°C to +85°C 286 B TA = –40°C to +125°C 305 TA = 0°C to +70°C 0.45 0.55 Input bias current drift(2) TA = –40°C to +85°C 0.45 0.55 nA/°C B TA = –40°C to +125°C 0.45 0.55 TA = +25°C ±5 ±50 A TA = 0°C to +70°C ±55 Input offset current nA TA = –40°C to +85°C ±57 B TA = –40°C to +125°C ±60 TA = 0°C to +70°C ±0.03 ±0.1 Input offset current drift(2) TA = –40°C to +85°C ±0.03 ±0.1 nA/°C B TA = –40°C to +125°C ±0.03 ±0.1 INPUT TA = +25°C, CMRR > 87 dB VS– – 0.2 VS– A Common-mode input low V TA = –40°C to +125°C, CMRR > 87 dB VS– – 0.2 VS– B TA = +25°C, CMRR > 87 dB VS+ – 1.2 VS+ – 1.1 A Common-mode input high V TA = –40°C to +125°C, CMRR > 87 dB VS+ – 1.2 VS+ – 1.1 B Common-mode rejection ratio 90 116 dB A Input impedance common-mode 200 || 1.2 C k Ω || pF Input impedance differential mode 200 || 1 C OUTPUT TA = +25°C VS– + VS– + A 0.06 0.2 Single-ended output voltage: low V TA = –40°C to +125°C VS– + VS– + B 0.06 0.2 TA = +25°C VS+ – 0.2 VS+ – A 0.11 Single-ended output voltage: high V TA = –40°C to +125°C VS+ – 0.2 VS+ – B 0.11 Output saturation voltage: high/low 110/60 mV C TA = +25°C ±15 ±22 A Linear output current drive mA TA = –40°C to +125°C ±15 B (2) Input offset voltage drift, input bias current drift, and input offset current drift are average values calculated by taking data at the end points, computing the difference, and dividing by the temperature range. 4 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links :THS4532 |
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