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AS8506 датащи(PDF) 65 Page - ams AG |
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AS8506 датащи(HTML) 65 Page - ams AG |
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65 / 89 page ![]() ams Datasheet, Confidential:2013-Sep [1-00] AS8506 – 65 Devic e I n te r f ac e Configuration and 3-Wire SPI Interface Related Registers Figure 73: Device Address for Address Allocation Register Figure 74: Allocated Device Address Register Figure 75: Device Configuration Setting Register Address Register Name Features and Bit Description SPI4 SPI3 POR Value 0x1A dadd_for_allc_reg The device address for address allocation. In the address allocation process the μC writes top device address in this register. Address “00000” is reserved as broadcast address. R/W R/W 0000_0000 POR_VSUP D5:D0 Device address D7:D6 Reserved Address Register Name Features and Bit Description SPI4 SPI3 POR Value 0x1B allcd_dev_add_reg Final device address after address allocation process is completed RR 0000_0000 POR_VSUP D5:D0 Device address D7:D6 Reserved Address Register Name Features and Bit Description SPI4 SPI3 POR Value 0x1C dev_cnfg_setg_reg Selects SPI3 frequency of operation. R/W - 0000_0000 POR_VSUP D1:D0 00 → 5 KHz 01 → 20 KHz 10 → 40 KHz 11 → Reserved D7:D2 Reserved |
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