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MSC1202Y2RHHT датащи(PDF) 25 Page - Texas Instruments

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номер детали MSC1202Y2RHHT
подробное описание детали  Precision Analog -to-Digital Converter
PDF  92 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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MSC1202Y2RHHT датащи(HTML) 25 Page - Texas Instruments

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MSC1200
MSC1201
MSC1202
SBAS317E − APRIL 2004 − REVISED MAY 2006
www.ti.com
25
For system calibration, the appropriate signal must be
applied to the inputs. It then computes an offset that will
nullify offset in the system. The system gain calibration
requires a positive full-scale differential input signal. It then
computes a gain value to nullify gain errors in the system.
Each of these calibrations will take seven tDATA periods to
complete.
Calibration should be performed after power on. It should
also be done after a change in temperature, decimation
ratio, buffer, power supply, voltage reference, or PGA. The
offset DAC will affect offset calibration; therefore, the value
of the offset should be zero before performing a calibration.
At the completion of calibration, the ADC Interrupt bit goes
high, which indicates the calibration is finished and valid
data is available.
ADC DIGITAL FILTER
The Digital Filter can use either the Fast Settling, Sinc2, or
Sinc3 filter, as shown in Figure 10. In addition, the Auto
mode changes the Sinc filter after the input channel or
PGA is changed. When switching to a new channel, it will
use the Fast Settling filter for the next two conversions, the
first of which should be discarded. It will then use the Sinc2
followed by the Sinc3 filter to improve noise performance.
This combines the low-noise advantage of the Sinc3 filter
with the quick response of the Fast Settling Time filter. The
frequency response of each filter is shown in Figure 11.
1
Fast
FILTER
SETTLING TIME
(Conversion Cycles)(1)
Sinc3
Sinc2
Fast
3
2
1
(1) With synchronized channel changes.
CONVERSION CYCLE
AUTO MODE FILTER SELECTION
FILTER SETTLING TIME
Adjustable Digital Filter
Data Out
Modulator
Fast Settling
Sinc2
Sinc3
2
Fast
3
Sinc2
4+
Sinc3
Figure 10. Filter Step Responses
SINC3 FILTER RESPONSE
f
DATA
0
−20
−40
−60
−80
−100
−120
0
1
2
345
0
1
2
345
0
1
2
345
SINC2 FILTER RESPONSE
f
DATA
0
−20
−40
−60
−80
−100
−120
FAST SETTLING FILTER RESPONSE
fDATA
0
−20
−40
−60
−80
−100
−120
NOTE: f
DATA = Data Output Rate = 1/tDATA
(
−3dB = 0.318 • f
DATA)
(
−3dB = 0.469 • f
DATA)
(
−3dB = 0.262 • f
DATA)
Figure 11. Filter Frequency Responses



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