MSC1202Y2RHHT datasheet(61/92 Pages) TI

61 / 92 page

MSC1200

MSC1201

MSC1202

SBAS317E − APRIL 2004 − REVISED MAY 2006

www.ti.com

Port 3 (P3)

Reset Value

SFR B0h

P3.7

P3.6

SCK/SCL/CLKS

P3.5

P3.4

P3.3

INT1

P3.2

INT0

P3.1

TXD0

P3.0

RXD0

FFh

P3.7−0

General-Purpose I/O Port 3. This register functions as a general-purpose I/O port. In addition, all the pins have an

bits 7−0

alternative function listed below. Each of the functions is controlled by several other SFRs. The associated Port 3

latch bit must contain a logic ‘1’ before the pin can be used in its alternate function capacity.

SCK/SCL/CLKS Clock Source Select. Refer to PASEL (SFR F2h).

bit 6

Timer/Counter 1 External Input. A 1 to 0 transition on this pin will increment Timer 1.

bit 5

Timer/Counter 0 External Input. A 1 to 0 transition on this pin will increment Timer 0.

bit 4

INT1

External Interrupt 1. A falling edge/low level on this pin will cause an external interrupt 1 if enabled.

bit 3

INT0

External Interrupt 0. A falling edge/low level on this pin will cause an external interrupt 0 if enabled.

bit 2

TXD0

Serial Port 0 Transmit. This pin transmits the serial Port 0 data in serial port modes 1, 2, 3, and emits the

bit 1

synchronizing clock in serial port mode 0.

RXD0

Serial Port 0 Receive. This pin receives the serial Port 0 data in serial port modes 1, 2, 3, and is a bidirectional data

bit 0

transfer pin in serial port mode 0.

MSC1202Y2RHHT датащи(PDF) 61 Page - Texas Instruments

MSC1202Y2RHHT датащи(HTML) 61 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

датащи скачать

ссылки URL