AS3675 datasheet(50/81 Pages) AMSCO

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AS3675

Datasheet - D e ta i l e d D e s c r i p t i o n

gpi_curr31_en

0R/W

Enables the CURR31 input

input disabled

input enabled

gpi_curr32_en

0R/W

Enables the CURR32 input

input disabled

input enabled

gpi_curr33_en

0R/W

Enables the CURR33 input

input disabled

input enabled

Table 69. GPIO signal 1

Addr: 06h

GPIO signal 1

This register controls GPIO outputs.

Bit

Bit Name

Default Access

Description

gpi_curr1_in

N/A

Reads a logic signal from pin CURR1; if gpi_curr1_en=1

gpi_curr2_in

N/A

Reads a logic signal from pin CURR2; if gpi_curr2_en=1

gpi_curr6_in

N/A

Reads a logic signal from pin CURR6; if gpi_curr6_en=1

N/A

not used

gpi_curr30_in

N/A

Reads a logic signal from pin CURR30; if gpi_curr30_en=1

gpi_curr31_in

N/A

Reads a logic signal from pin CURR31; if gpi_curr31_en=1

gpi_curr32_in

N/A

Reads a logic signal from pin CURR32; if gpi_curr32_en=1

gpi_curr33_in

N/A

Reads a logic signal from pin CURR33; if gpi_curr33_en=1

Table 70. GPIO output 2

Addr: 50h

GPIO output 2

This register controls GPIO outputs.

Bit

Bit Name

Default Access

Description

gpio_out

0R/W

Writes a logic signal to pin GPIO; this is independent of any

other bit setting e.g., gpio_mode Table 72.

gpi_en

0R/W

Enables the VANA/GPI input

input disabled

input enabled

gpi_rgb1_en

0R/W

Enables the RGB1 input

input disabled

input enabled

gpi_rgb2_en

0R/W

Enables the RGB2 input

input disabled

input enabled

Table 68. GPIO output 1

Addr: 05h

GPIO output 1

This register controls GPIO outputs.

Bit

Bit Name

Default Access

Description

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