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AS3675 датащи(PDF) 42 Page - ams AG |
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AS3675 датащи(HTML) 42 Page - ams AG |
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42 / 81 page ![]() www.austriamicrosystems.com/AS3675 1v3 41 - 80 AS3675 Datasheet - D e ta i l e d D e s c r i p t i o n Figure 23. PWM Control Circuit (currX_mode = 10b (PWM controlled)); X = any current sink The adder logic (available for all current sinks) is intended to allow dimming not only from 0% to 100% (or 100% to 0%) of currX_current, but also e.g. from 10% to 110% (or 110% to 10%) of currX_current. The starting current for up dim- ming is defined by 0 + currX_adder and the end current is defined by currX_current + currX_adder. An overflow of the internal bus (8 Bits wide to the IDAC) has to be avoided by the register settings (currX_current + currX_adder must not exceed 255). If the register subX_en is set, the result from the pwm modulator is inverted logically. That means for up dimming the starting current is defined by currX_adder - 1 and the end current is defined by currX_adder - currX_current - 1. An overflow of the internal bus (8 Bits wide to the IDAC) has to be avoided by the register settings (currX_adder - currX_current - 1 must not be below zero). Its purpose is to dim one channel e.g. CURR30 from e.g. 110% to 10% of curr30_current and at the same time dim another channel e.g. CURR31 from 20% to 120% of curr31_current. Note: The adder logic operates independent of the currX_mode setting, but its main purpose is to work together with the pwm modulator (improved up/down dimming) If the adder logic is not used anymore, set the bit currX_adder to 0. (Setting adder_currentX to 0 is not suffi- cient) At the end of up/down dimming, the pwm_code register keeps its final value (for up-dimming 255 and for down- dimming 0). This can be used to identify the exact time, when up/down dimming is finished. Table 56. PWM Dimming Table Decrease by 1/4th every step Decrease by 1/8th every step Seconds Seconds Seconds Seconds Step %Dimming PWM %Dimming PWM 50msec/ Step 25msec/ Step 5msec/ Step 2.5msec/ Step 1 100,0 255 100,0 255 0,00s 0,00s 0,000s 0,000s 2 75,3 192 87,8 224 0,05s 0,03s 0,005s 0,003s 3 56,5 144 76,9 196 0,10s 0,05s 0,010s 0,005s 4 42,4 108 67,5 172 0,15s 0,08s 0,015s 0,008s 5 31,8 81 59,2 151 0,20s 0,10s 0,020s 0,010s 6 23,9 61 52,2 133 0,25s 0,13s 0,025s 0,013s 7 18,0 46 45,9 117 0,30s 0,15s 0,030s 0,015s 8 13,7 35 40,4 103 0,35s 0,18s 0,035s 0,018s 9 10,6 27 35,7 91 0,40s 0,20s 0,040s 0,020s 10 8,2 21 31,4 80 0,45s 0,23s 0,045s 0,023s 11 6,3 16 27,5 70 0,50s 0,25s 0,050s 0,025s !!" # $ %! & % ' !& ! () ) * "! AS3675 |
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