AS3517H-ECTP datasheet(33/94 Pages) AMSCO

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AS3517 V17

Data Sheet, Confidential

www.austriamicrosystems.com

9.2 Power Management Functions

9.2.1

Low Drop Out Regulators

General

These LDO’s are designed to supply sensitive analogue circuits, audio devices, AD and DA converters, micro-controller and other

peripheral devices.The design is optimised to deliver the best compromise between quiescent current and regulator performance for

battery powered devices.

Stability is guaranteed with ceramic output capacitors of 1μF +/-20% (X5R) or 2.2μF +100/-50% (Z5U). The low ESR of these caps

ensures low output impedance at high frequencies. Regulation performance is excellent even under low dropout conditions, when the

power transistor has to operate in linear mode. Power supply rejection is high enough to suppress high ripple on the battery at the output.

The low noise performance allows direct connection of noise sensitive circuits without additional filtering networks. The low impedance of

the power device enables the device to deliver up to 150mA even at nearly discharged batteries without any decrease of performance.

Figure 18 LDO Block Diagram

LDO1

This LDO generates the analog supply voltage used for the AFE itself.

•

Input voltage is BVDD

•

Output voltage is AVDD (typ. 2.9V)

•

Driver strength: 200mA

It is set to a fixed output voltage of 2.9V, 200mAmax. It supplies the analog part of the AFE. Additional external loads are possible but most

not exceed the supply ratings in total together with the operating internal blocks. Further the external load must not induce noise to the

sensitive AVDD supply pin.

LDO2

This LDO generates the digital supply voltage used for the AFE itself.

•

Input Voltage is BVDD

•

Output Voltage is DVDD (typ. 2.9V)

•

Driver strength: 200mA

It is set to a fixed output voltage of 2.9V, 200mAmax. It supplies the digital part of the AFE. Additional external loads are possible but most

not exceed the supply ratings in total together with the operating internal blocks. Further the external load must not induce noise to the

DVDD supply pin but is not as critical as AVDD.

LDO3 & LDO4

These LDO can used to generate the periphery voltage for the digital processor or other external components (e.g. ext. DAC, USB-PHY,

SD-Cards, NAND-Flashes, FM-Tuner …)

•

Input Voltage BVDD

•

Output Voltage is PVDD1 & PVDD2 (1.2 to 3.5V)

•

Default value at start-up is defined by VPROG1 and VPROG2 pins

•

Driver strength: 200mA

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