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AS3517H-ECTP датащи(PDF) 79 Page - ams AG

номер детали AS3517H-ECTP
подробное описание детали  Stereo Audio Codec with enhanced System Power Management
PDF  94 Pages
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производитель  AMSCO [ams AG]
домашняя страница  http://www.ams.com
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AS3517H-ECTP датащи(HTML) 79 Page - ams AG

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AS3517 V17
Data Sheet, Confidential
© 2003-2007, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
Table 80 DCDC15 Register
Name
Base
Default
DCDC15
2-wire serial
00h
15V DCDC Step-up Control Register
Offset: 1Bh
Controls the back-light current and back-light dim rate.
This register is reset at a DVDD-POR.
Bit
Bit Name
Default
Access
Bit Description
7
DIM_UP_DOWN
0
R/W
Starts dimming UP/DOWN or switches LED back-light ON/OFF
when DIM_RATE = 00b
0: dim DOWN
1: dim UP
6:5
DIM_RATE
00
R/W
Sets the dim rate of the LED back-light current from 0mA to
I_BACKLIGHT and vice versa
00: no dimming (immediate ON/OFF)
01: 150ms
10: 300ms
11: 500ms
4:0
I_BACKLIGHT
00000
R/W
Sets the current into pin ISINK in 1.25mA steps (internal
current source to control LED backlight current). Setting
11111b enables the voltage feedback mode to supply e.g.
OLEDs with a constant voltage supply.
00000: DCDC15 switched off
00001: 1.25mA
00010: 2.5mA
..
11110: 37.5mA
11111: 38.75mA
Table 81 I2S Register
Name
Base
Default
I2S
2-wire serial
00h
I2S Mode Control Register (Master Mode only)
Offset: 1Ch
Contains lower 8 bits for I2S master mode clock generation divider.
This register is reset at a DVDD-POR.
Bit
Bit Name
Default
Access
Bit Description
7:0
I2S_DIVIDER
00h
R/W
Please see master clock divider table
Revision 1v3
78
- 93



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