DSPIC33FJ64GP706 datasheet(242/322 Pages) MICROCHIP

242 / 322 page

dsPIC33FJXXXGPX06/X08/X10

DS70286C-page 240

IESO

FOSCSEL

Two-speed Oscillator Start-up Enable bit

= Start-up device with FRC, then automatically switch to the user-selected

oscillator source when ready

= Start-up device with user-selected oscillator source

FNOSC<2:0>

FOSCSEL

Initial Oscillator Source Selection bits

111

= Internal Fast RC (FRC) oscillator with postscaler

110

= Internal Fast RC (FRC) oscillator with divide-by-16

101

= LPRC oscillator

100

= Secondary (LP) oscillator

011

= Primary (XT, HS, EC) oscillator with PLL

010

= Primary (XT, HS, EC) oscillator

001

= Internal Fast RC (FRC) oscillator with PLL

000

= FRC oscillator

FCKSM<1:0>

FOSC

Clock Switching Mode bits

= Clock switching is disabled, Fail-Safe Clock Monitor is disabled

= Clock switching is enabled, Fail-Safe Clock Monitor is disabled

= Clock switching is enabled, Fail-Safe Clock Monitor is enabled

OSCIOFNC

FOSC

OSC2 Pin Function bit (except in XT and HS modes)

= OSC2 is clock output

= OSC2 is general purpose digital I/O pin

POSCMD<1:0>

FOSC

Primary Oscillator Mode Select bits

= Primary oscillator disabled

= HS Crystal Oscillator mode

= XT Crystal Oscillator mode

= EC (External Clock) mode

FWDTEN

FWDT

Watchdog Timer Enable bit

= Watchdog Timer always enabled (LPRC oscillator cannot be disabled. Clearing

the SWDTEN bit in the RCON register will have no effect.)

= Watchdog Timer enabled/disabled by user software (LPRC can be disabled

by clearing the SWDTEN bit in the RCON register)

WINDIS

FWDT

Watchdog Timer Window Enable bit

= Watchdog Timer in Non-Window mode

= Watchdog Timer in Window mode

WDTPRE

FWDT

Watchdog Timer Prescaler bit

= 1:128

= 1:32

WDTPOST

FWDT

Watchdog Timer Postscaler bits

1111

= 1:32,768

1110

= 1:16,384

0001

= 1:2

0000

= 1:1

JTAGEN

FICD

JTAG Enable bits

= JTAG enabled

= JTAG disabled

ICS<1:0>

FICD

ICD Communication Channel Select bits

= Communicate on PGEC1 and PGED1

= Communicate on PGEC2 and PGED2

= Communicate on PGEC3 and PGED3

= Reserved

TABLE 22-2:

dsPIC33FJXXXGPX06/X08/X10 CONFIGURATION BITS DESCRIPTION (CONTINUED)

Bit Field

Description

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