74LVC2G00

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Product data sheet

Rev. 12 — 8 April 2013

12 of 20

NXP Semiconductors

74LVC2G00

Dual 2-input NAND gate

Fig 13. Package outline SOT1089 (XSON8)

References

Outline

version

European

projection

Issue date

IEC

JEDEC

JEITA

SOT1089

MO-252

sot1089_po

10-04-09

10-04-12

Unit

mm

max

nom

min

0.5

0.04

1.40

1.35

1.30

1.05

1.00

0.95

0.55

0.35

0.35

0.30

0.27

Dimensions

Note

1. Including plating thickness.

2. Visible depending upon used manufacturing technology.

XSON8: extremely thin small outline package; no leads;

8 terminals; body 1.35 x 1 x 0.5 mm

SOT1089

0.40

0.35

0.32

0.20

0.15

0.12

DE

e

L

0

0.5

1 mm

scale

terminal 1

index area

E

D

detail X

A

L

b

e

terminal 1

index area

1

4

8

5

(4

(8

X