74LVC2G00GD datasheet(8/20 Pages) NXP

8 / 20 page

74LVC2G00

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Product data sheet

Rev. 12 — 8 April 2013

8 of 20

NXP Semiconductors

74LVC2G00

Dual 2-input NAND gate

Table 9.

Measurement points

Supply voltage

Input

Output

VCC

1.65 V to 1.95 V

0.5

 V

0.5

 V

2.3 V to 2.7 V

0.5

 V

0.5

 V

2.7 V

1.5 V

3.0 V to 3.6 V

1.5 V

4.5 V to 5.5 V

0.5

 V

0.5

 V

Test data is given in Table 10.

Definitions for test circuit:

RL = Load resistor.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = Test voltage for switching times.

Fig 9.

Test circuit for measuring switching times

VEXT

VCC

001aae235

DUT

PULSE

GENERATOR

10 %

90 %

0 V

negative

pulse

positive

pulse

0 V

90 %

10 %

Table 10.

Test data

Supply voltage

Input

Load

VEXT

VCC

tr, tf

tPLH, tPHL

1.65 V to 1.95 V

VCC

 2.0 ns

30 pF

1 k



open

2.3 V to 2.7 V

VCC

 2.0 ns

30 pF

500



open

2.7 V

 2.5 ns

50 pF

500



open

3.0 V to 3.6 V

2.7 V

 2.5 ns

50 pF

500



open

4.5 V to 5.5 V

VCC

 2.5 ns

50 pF

500



open

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